IS31AP4996
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 07/23/2013
7
APPLICATION INFORMATION
BTL CONFIGURATION PRINCIPLE
The IS31AP4996 is a monolithic power amplifier with a
BTL output type. BTL (bridge tied load) means that
each end of the load is connected to two single-ended
output amplifiers. Thus, we have:
Single-ended output 1 = V
OUT+
= V
OUT
(V)
Single ended output 2 = V
OUT-
= -V
OUT
(V)
and
V
OUT+
- V
OUT-
= 2V
OUT
(V)
The output power is:
L
OUT
OUT
R
V
P
RMS
2
)2(
For the same power supply voltage, the output power
in BTL configuration is four times higher than the
output power in single ended configuration.
GAIN IN A TYPICAL APPLICATION SCHEMATIC
The typical application schematic is shown in Figure 1.
In the flat region (no C
IN
effect), the output voltage of
the first stage is (in Volts):
IN
F
INOUT
R
R
VV )(
For the second stage: V
OUT+
= -V
OUT-
(V)
The differential output voltage is (in Volts):
IN
F
INOUTOUT
R
R
VVV 2
The differential gain, G
V
, is given by:
IN
F
IN
OUTOUT
v
R
R
V
VV
G 2
V
OUT-
is in phase with V
IN
and V
OUT+
is phased 180°
with V
IN
. This means that the positive terminal of the
loudspeaker should be connected to V
OUT+
and the
negative to V
OUT-
.
LOW AND HIGH FREQUENCY RESPONSE
In the low frequency region, C
IN
starts to have an effect.
C
IN
forms with R
IN
a high-pass filter with a -3dB cut-off
frequency. f
CL
is in Hz.
ININ
CL
CR
f
2
1
In the high frequency region, you can limit the
bandwidth by adding a capacitor (C
F
) in parallel with R
F
.
It forms a low-pass filter with a -3dB cut-off frequency.
f
CH
is in Hz.
FF
CH
CR
f
2
1
DECOUPLING OF THE CIRCUIT
Two capacitors are needed to correctly bypass the
IS31AP4996: a power supply bypass capacitor C
S
and
a bias voltage bypass capacitor C
BYPASS
.
C
S
has particular influence on the THD+N in the high
frequency region (above 7kHz) and an indirect
influence on power supply disturbances. With a value
for C
S
of 1F, you can expect THD+N levels similar to
those shown in the datasheet.
In the high frequency region, if C
S
is lower than 1F, i t
increases THD+N and disturbances on the power
supply rail are less filtered.
On the other hand, if C
S
is higher than 1F, those
disturbances on the power supply rail are more filtered.
C
BYPASS
has an influence on THD+N at lower
frequencies, but its function is critical to the final result
of PSRR (with input grounded and in the lower
frequency region).
If C
BYPASS
is lower than 0.47F, THD+N increases at
lower frequencies and PSRR worsens.
If C
BYPASS
is higher than 0.47F, the benefit on THD+N
at lower frequencies is small, but the benefit to PSRR
is substantial.
Note that C
IN
has a non-negligible effect on PSRR at
lower frequencies. The lower the value of C
IN
, the
higher the PSRR is.
WAKE-UP TIME (t
WU
)
When the standby is released to put the device on, the
bypass capacitor C
BYPASS
will not be charged
immediately. As C
BYPASS
is directly linked to the bias of
the amplifier, the bias will not work properly until the
C
BYPASS
voltage is correct. The time to reach this
voltage is called wake-up time or t
WU
and specified in
the electrical characteristics table with C
BYPASS
=
0.47F.
POP PERFORMANCE
Pop performance is intimately linked with the size of
the input capacitor C
IN
and the bias voltage bypass
capacitor C
BYPASS
.
The size of C
IN
is dependent on the lower cut-off
frequency and PSRR values requested. The size of
C
BYPASS
is dependent on THD+N and PSRR values
requested at lower frequencies.
Moreover, C
BYPASS
determines the speed with which
the amplifier turns on.
