© Semiconductor Components Industries, LLC, 2014
April, 2014 − Rev. 17
1 Publication Order Number:
MC10EP56/D
MC10EP56, MC100EP56
3.3V / 5V ECL Dual
Differential 2:1 Multiplexer
Description
The MC10/100EP56 is a dual, fully differential 2:1 multiplexer. The
differential data path makes the device ideal for multiplexing low
skew clock or other skew sensitive signals. Multiple V
BB
pins are
provided.
The V
BB
pin, an internally generated voltage supply, is available to
this device only. For single−ended input conditions, the unused
differential input is connected to V
BB
as a switching reference voltage.
V
BB
may also rebias AC coupled inputs. When used, decouple V
BB
and V
CC
via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V
BB
should be left open.
The device features both individual and common select inputs to
address both data path and random logic applications.
The 100 Series contains temperature compensation.
Features
• 360 ps Typical Propagation Delays
• Maximum Frequency > 3 GHz Typical
• PECL Mode Operating Range: V
CC
= 3.0 V to 5.5 V
with V
EE
= 0 V
• NECL Mode Operating Range: V
CC
= 0 V
with V
EE
= −3.0 V to −5.5 V
• Open Input Default State
• Safety Clamp on Inputs
• Separate and Common Select
• Q Output Will Default LOW with Inputs Open or at V
EE
• V
BB
Outputs
• These Devices are Pb−Free and are RoHS Compliant
XXXX = MC10 or 100
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G, G = Pb−Free Package
SOIC−20
DW SUFFIX
CASE 751D
MARKING DIAGRAMS*
TSSOP−20
DT SUFFIX
CASE 948R
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
(Note: Microdot may be in either location)
20
1
MC100EP56
AWLYYWWG
XXXX
EP56
ALYWG
G
1
20
QFN−20
MN SUFFIX
CASE 485E
XXXX
EP56
ALYWG
G
