12
FN7014.5
March 26, 2007
FIGURE 37. LOAD RESISTANCE vs OUTPUT VOLTAGE
(ALL POWER MODES)
FIGURE 38. I
S
+ vs R
ADJ
(FULL POWER MODE)
FIGURE 39. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 40. POWER DISSIPATION vs AMBIENT
TEMPERATURE for VARIOUS MOUNTED θ
JA
s
(See Thermal Resistance Curve on page 15)
FIGURE 41. 16 LD SOIC POWER DISSIPATION and THERMAL
RESISTANCE
FIGURE 42. 24 LD QFN POWER DISSIPATION vs AMBIENT
TEMPERATURE
Typical Performance Curves (Continued)
21.6
21.4
21.2
21.0
20.8
20.6
50 90 130 150 170 190
DIFFERENTIAL LOAD RESISTANCE (Ω)
OUTPUT VOLTAGE
P-P
(V)
70 110
FREQ=100kHz
V
S
=±12V
R
SET
=0
A
V
=10
25
21
17
13
9
5
0246810
R
ADJ
(kΩ)
I
S
+ (mA)
V
S
=±12V
R
FB
=10
A
V
=10
R
L
=100Ω
30
25
20
15
10
5
0
02 681012
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
F
U
L
L
P
O
W
E
R
+
1
/
3
P
O
W
E
R
2
/
3
P
O
W
E
R
-
+
-
+
-
4
0100
0.5
POWER DISSIPATION (W)
AMBIENT TEMPERATURE (°C)
0
40
4.5
-40 20-20 60 80
3.5
3.0
2.5
2.0
1.5
1.0
4.0
θ
JA
= 30°C/W
θ
JA
= 43°C/W
θ
JA
= 53°C/W
θ
JA
= 80°C/W
100-40 -20 0 20 40 60
AMBIENT TEMPERATURE (°C)
POWER DISSIPATION (W)
4
0
1
2
2.5
3
3.5
0.5
1.5
80
θ
J
A
=
4
7
°
C
/
W
USING ELANTEC EL1503CS DEMO BOARD, 2”X2”
(4-LAYER). DEMO BOARD WITH HEATSINK VIA
INTERNAL GROUND PLANE
1500 255075100125
AMBIENT TEMPERATURE (°C)
POWER DISSIPATION (W)
4.0
0
0.5
1.0
1.5
2.0
3.0
85
3.5
2.5
θ
J
A
=
3
7
°
C
/
W
USING JEDEC JESD51-3 HIGH EFFECTIVE THERMAL
CONDUCTIVITY. (4-LAYER) TEST BOARD, QFN
EXPOSED DIEPAD SOLDERED TO PCB PER JESD51-5
3.378W
EL1508
