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IRL8113STRRPBF
P1-P3
P4-P6
P7-P9
P10-P12
P13-P13
IRL81
13/S/LPbF
4
www.irf.com
Fig 8.
Maximum Safe Operating Area
Fig 6.
Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 5.
Typical Capacitance vs.
Drain-to-Source Voltage
Fig 7.
Typical Source-Drain Diode
Forward Voltage
1
10
100
V
DS
, D
rai
n-t
o-S
ource V
olt
age (V)
100
1000
10000
100000
C
,
C
a
p
a
c
i
t
a
n
c
e
(
p
F
)
Coss
Crss
Ciss
V
GS
= 0V, f = 1 MHZ
C
iss
= C
gs
+ C
gd
, C
ds
SHO
RTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
0
1
02
03
04
0
5
06
0
Q
G
Tota
l Ga
te C
ha
rge
(n
C)
0
2
4
6
8
10
12
V
G
S
,
G
a
t
e
-
t
o
-
S
o
u
r
c
e
V
o
l
t
a
g
e
(
V
)
V
DS
= 24V
VDS= 15
V
I
D
= 17
A
0.0
0.5
1.0
1.5
2.0
2.5
3.0
V
SD
, S
ource-
to-
Dr
ain V
olt
age (V)
0.1
1.0
10.0
100.0
1000.0
I
S
D
,
R
e
v
e
r
s
e
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
T
J
= 25°
C
T
J
= 175°
C
V
GS
= 0V
0.1
1.0
10.0
100.0
V
DS
, D
rai
n-t
oSour
ce Vol
t
age (V
)
0.1
1
10
100
1000
10000
I
D
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
Tc =
25°C
Tj
= 175°C
Si
ngl
e Pul
se
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R
DS
(on)
100µsec
IRL81
13/S/LPbF
www.irf.com
5
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9.
Maximum Drain Current vs.
Case Temperature
Fig 10.
Threshold Voltage vs. Temperature
25
50
75
100
125
150
175
T
C
, C
ase Temper
atur
e (°
C)
0
20
40
60
80
100
120
I
D
,
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
LIM
ITED BY PACKAGE
-75
-50
-25
0
25
50
75
100
125
150
175
T
J
, T
emper
atur
e ( °
C )
0.5
1.0
1.5
2.0
2.5
V
G
S
(
t
h
)
G
a
t
e
t
h
r
e
s
h
o
l
d
V
o
l
t
a
g
e
(
V
)
I
D
= 250µA
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
1
, R
ectangul
ar P
uls
e Durat
i
on (sec)
0.0001
0.001
0.01
0.1
1
T
h
e
r
m
a
l
R
e
s
p
o
n
s
e
(
Z
t
h
J
C
)
0.20
0.10
D =
0.50
0.02
0.01
0.05
SINGLE PUL
SE
( THERMAL RESPO
NSE )
Notes
:
1. Du
ty
Fac
tor D
= t1/t2
2. P
eak Tj
=
P dm x Z
t
hjc +
Tc
Ri (°C/W)
τ
i (sec)
0.430 0.000266
0.397 0.000685
0.493 0.007393
τ
J
τ
J
τ
1
τ
1
τ
2
τ
2
τ
3
τ
3
R
1
R
1
R
2
R
2
R
3
R
3
τ
τ
C
Ci=
τ
i
/
Ri
Ci=
τ
i
/
Ri
IRL81
13/S/LPbF
6
www.irf.com
Fig 13c.
Maximum Avalanche Energy
Vs. Drain Current
Fig 14a.
Switching Time Test Circuit
Fig 14b.
Switching Time Waveforms
V
GS
V
DS
9
0%
10%
t
d(
o
n)
t
d(off)
t
r
t
f
V
GS
Puls
e Widt
h < 1µ
s
Duty Fac
tor < 0.1
%
V
DD
V
DS
L
D
D.U.T
+
-
Fig 13b.
Unclamped Inductive Waveforms
Fig 13a.
Unclamped Inductive Test Circuit
t
p
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
V
DS
+
-
V
DD
DRIVER
A
15V
20V
V
GS
Fig 12.
On-Resistance Vs. Gate Voltage
2.0
4.0
6.0
8.0
10.0
V
GS
, G
ate-
to-
Sour
ce Vol
tage (
V)
0
10
20
30
40
R
D
S
(
o
n
)
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
O
n
R
e
s
i
s
t
a
n
c
e
(
m
Ω
)
T
J
= 25°
C
T
J
= 125°
C
I
D
= 21A
25
50
75
100
125
150
175
St
art
i
ng T
J
, Junct
ion T
emperatur
e (°
C)
0
200
400
600
800
1000
E
A
S
,
S
i
n
g
l
e
P
u
l
s
e
A
v
a
l
a
n
c
h
e
E
n
e
r
g
y
(
m
J
)
I
D
TOP
8.8
A
11
A
BOTTOM
17A
P1-P3
P4-P6
P7-P9
P10-P12
P13-P13
IRL8113STRRPBF
Mfr. #:
Buy IRL8113STRRPBF
Manufacturer:
Infineon Technologies
Description:
MOSFET N-CH 30V 105A D2PAK
Lifecycle:
New from this manufacturer.
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