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A4987SLPTR-T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
DMOS Dual Full-Bridge PWM Motor Driver
With Overcurrent Protection
A4987
4
Allegro MicroSystems, LLC
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
ELECTRICAL CHARACTERISTICS
1
at T
A
= 25°C, V
BB
= 35 V (unless otherwise noted)
Characteristics Symbol Test Conditions Min.
Typ.
2
Max. Units
Output Drivers
Load Supply Voltage Range V
BB
Operating 8 – 35 V
During Sleep Mode 0 – 35 V
Logic Supply Voltage Range V
DD
Operating 3.0 – 5.5 V
Output On Resistance R
DS(ON)
Source Driver, I
OUT
= –800 mA – 700 900 m
Sink Driver, I
OUT
= 800 mA – 700 900 m
Body Diode Forward Voltage V
F
Source Diode, I
F
= –800 mA – – 1.3 V
Sink Diode, I
F
= 800 mA – – 1.3 V
Motor Supply Current I
BB
f
PWM
< 50 kHz – – 4 mA
Operating, outputs disabled – – 2 mA
Sleep Mode – – 10 A
Logic Supply Current I
DD
f
PWM
< 50 kHz – – 8 mA
Outputs off – – 5 mA
Sleep Mode – – 10 A
Control Logic
Logic Input Voltage
V
IN(1)
V
DD
0.7
––V
V
IN(0)
––
V
DD
0.3
V
Logic Input Current
I
IN(1)
V
IN
= V
DD
0.7
–20 <1.0 20 A
I
IN(0)
V
IN
=
V
DD
0.3
–20 <1.0 20 A
Logic Input Pull-down
R
IN02
– 100 – k
R
IN12
–50–k
Logic Input Hysteresis V
HYS(IN)
As a % of V
DD
51119%
Blank Time
t
BLANK
0.7 1 1.3 s
Fixed Off-Time
t
OFF
OSC = VDD or GND 20 30 40 s
R
OSC
= 25 k 23 30 37 s
Reference Input Voltage Range V
REF
0–4V
Reference Input Current I
REF
–3 0 3 A
Current Trip-Level Error
3
err
I
V
REF
= 2 V, %I
TripMAX
= 33.3% – – ±15 %
V
REF
= 2 V, %I
TripMAX
= 66.7% – – ±5 %
V
REF
= 2 V, %I
TripMAX
= 100.00% – – ±5 %
Crossover Dead Time t
DT
100 475 800 ns
Protection
Overcurrent Protection Threshold
4
I
OCPST
1.1 – – A
Thermal Shutdown Temperature T
TSD
– 165 – °C
Thermal Shutdown Hysteresis T
TSDHYS
–15–°C
VDD Undervoltage Lockout V
DDUVLO
V
DD
rising 2.7 2.8 2.9 V
VDD Undervoltage Hysteresis V
DDUVLOHYS
–90–mV
1
For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin.
2
Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for individual
units, within the specified maximum and minimum limits.
3
V
ERR
= [(V
REF
/8) – V
SENSE
] / (V
REF
/8).
4
Overcurrent protection (OCP) is tested at T
A
= 25°C in a restricted range and guaranteed by characterization.
DMOS Dual Full-Bridge PWM Motor Driver
With Overcurrent Protection
A4987
5
Allegro MicroSystems, LLC
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
THERMAL CHARACTERISTICS may require derating at maximum conditions
Characteristic Symbol Test Conditions* Value Units
Package Thermal Resistance
R
θJA
ES package; estimated, on 4-layer PCB, based on JEDEC standard 37 ºC/W
LP package; on 4-layer PCB, based on JEDEC standard 28 ºC/W
*In still air. Additional thermal information available on Allegro Web site.
20 40 60 80 100 120 140 160 180
Temperature (°C)
Power Dissipation, P
D
(W)
0.0
0.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
1.0
1.5
Maximum Power Dissipation, P
D
(max)
(R
θJA
= 37 ºC/W)
(R
θJA
= 28 ºC/W)
DMOS Dual Full-Bridge PWM Motor Driver
With Overcurrent Protection
A4987
6
Allegro MicroSystems, LLC
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Functional Description
Device Operation. The A4987 is designed to operate one
stepper motor in full, half, or quarter step mode. The currents in
each of the output full-bridges, all N-channel DMOS, are regu-
lated with fixed off-time pulse width modulated (PWM) control
circuitry. Each full-bridge peak current is set by the value of
an external current sense resistor, R
Sx
, and a reference voltage,
V
REFx
.
Percentages of the peak current are set using a 2-bit nonlinear
DAC that programs 33%, 66%, or 100% of the peak current, or
disables the outputs.
Internal PWM Current Control. Each full-bridge is con-
trolled by a fixed off-time PWM current control circuit that limits
the load current to a desired value, I
TRIP
. Initially, a diagonal pair
of source and sink FET outputs are enabled and current flows
through the motor winding and the current sense resistor, R
Sx
.
When the voltage across R
Sx
equals the DAC output voltage, the
current sense comparator resets the PWM latch. The latch then
turns off the appropriate source driver and initiates a fixed off
time decay mode.
The maximum value of current limiting is set by the selection of
R
Sx
and the voltage at the VREF pin. The transconductance func-
tion is approximated by the maximum value of current limiting,
I
TripMAX
(A), which is set by
I
TripMAX
= V
REF
/ ( 8
R
S
)
where R
S
is the resistance of the sense resistor (Ω) and V
REF
is
the input voltage on the REF pin (V).
The 2-bit DAC output reduces the V
REF
output to the current
sense comparator in precise steps, such that
I
trip
= (%I
TripMAX
/ 100)
×
I
TripMAX
It is critical that the maximum rating (0.5 V) on the SENSE1 and
SENSE2 pins is not exceeded.
Fixed Off-Time. The internal PWM current control circuitry
uses a one-shot circuit to control the duration of time that the
DMOS FETs remain off. The off-time, t
OFF
, is determined by the
ROSC terminal. The ROSC terminal has two settings:
▪ ROSC tied to VDD or ground — off-time internally set to 30 μs
▪ ROSC through a resistor to ground — off-time is determined by
the following formula:
t
OFF
≈ R
OSC
⁄ 825
Blanking. This function blanks the output of the current sense
comparators when the outputs are switched by the internal current
control circuitry. The comparator outputs are blanked to prevent
false overcurrent detection due to reverse recovery currents of the
clamp diodes, and switching transients related to the capacitance
of the load. The blank time, t
BLANK
(μs), is approximately
t
BLANK
≈ 1 μs
Shorted-Load and Short-to-Ground Protection.
If the motor leads are shorted together, or if one of the leads is
shorted to ground, the driver will protect itself by sensing the
overcurrent event and disabling the driver that is shorted, protect-
ing the device from damage. In the case of a short-to-ground, the
device will remain disabled (latched) until the S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
input goes
high or VDD power is removed. A short-to-ground overcurrent
event is shown in figure 1.
When the two outputs are shorted together, the current path is
through the sense resistor. After the blanking time (≈1 μs) expires,
the sense resistor voltage is exceeding its trip value, due to the
overcurrent condition that exists. This causes the driver to go into
a fixed off-time cycle. After the fixed off-time expires the driver
turns on again and the process repeats. In this condition the driver
is completely protected against overcurrent events, but the short
is repetitive with a period equal to the fixed off-time of the driver.
This condition is shown in figure 2.
During a shorted load event it is normal to observe both a posi-
tive and negative current spike as shown in figure 3, due to the
direction change implemented by the Mixed decay feature. This
is shown in figure 3. In both instances the overcurrent circuitry is
protecting the driver and prevents damage to the device.
Functional Description
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

A4987SLPTR-T

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