10
FN6045.6
May 13, 2010
Power Supply Decoupling
In most circumstances a 0.1µF bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple V
CC
to ground with a
capacitor of the same value as the charge-pump capacitor C
1
.
Connect the bypass capacitor as close as possible to the IC.
Transmitter Outputs when Exiting
Power-down
Figure 8 shows the response of two transmitter outputs
when exiting power-down mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kΩ in parallel with 2500pF.
Note that the transmitters enable only when the magnitude
of the supplies exceed approximately 3V.
Operation Down to 2.7V
ISL4221E, ISL4223E and ISL3232E transmitter outputs
meet RS-562 levels (±3.7V), at the full data rate, with V
CC
as low as 2.7V. RS-562 levels typically ensure inter
operability with RS-232 devices.
High Data Rates
The ISL4221E, ISL4223E and ISL3232E maintain the RS-
232 ±5V minimum transmitter output voltages even at high
data rates. Figure 9 details a transmitter loopback test
circuit, and Figure 10 illustrates the loopback test result at
120kbps. For this test, all transmitters were simultaneously
driving RS-232 loads in parallel with 1000pF, at 120kbps.
Figure 11 shows the loopback results for a single transmitter
driving 1000pF and an RS-232 load at 250kbps. The static
transmitters were also loaded with an RS-232 receiver.
TIME (20µs/DIV)
T1
T2
2V/DIV
5V/DIV
V
CC
= +3.3V
FORCEOFF
FIGURE 8. TRANSMITTER OUTPUTS WHEN EXITING
POWER-DOWN
C1 - C4 = 0.1µF
FIGURE 9. TRANSMITTER LOOPBACK TEST CIRCUIT
FIGURE 10. LOOPBACK TEST AT 120kbps
FIGURE 11. LOOPBACK TEST AT 250kbps
ISL4221E, ISL4223E
V
CC
FORCEOFF
C
1
C
2
C
4
C
3
+
+
+
+
1000pF
V+
V-
5k
T
IN
R
OUT
C1+
C1-
C2+
C2-
R
IN
T
OUT
+
V
CC
0.1µF
V
CC
FORCEON
T1
IN
T1
OUT
R1
OUT
TIME (5µs/DIV)
V
CC
= +3.3V
5V/DIV
C1 - C4 = 0.1µF
T1
IN
T1
OUT
R1
OUT
TIME (2µs/DIV)
5V/DIV
V
CC
= +3.3V
C1 - C4 = 0.1µF
ISL3232E, ISL4221E, ISL4223E
11
FN6045.6
May 13, 2010
Interconnection with 3V and 5V Logic
The ISL4221E, ISL4223E and ISL3232E directly interface
with 5V CMOS and TTL logic families. Nevertheless, with the
ISL4221E, ISL4223E and ISL3232E at 3.3V, and the logic
supply at 5V, AC, HC, and CD4000 outputs can properly
drive ISL4221E, ISL4223E and ISL3232E inputs, but
ISL4221E, ISL4223E and ISL3232E outputs do not reach
the minimum V
IH
for these logic families. See Table 3 for
more information.
±15kV ESD Protection
All pins on ISL4221E, ISL4223E and ISL3232E devices
include ESD protection structures, but the RS-232 pins
(transmitter outputs and receiver inputs) incorporate
advanced structures, which allow them to survive ESD
events up to ±15kV. The RS-232 pins are particularly
vulnerable to ESD damage because they typically connect to
an exposed port on the exterior of the finished product.
Simply touching the port pins, or connecting a cable, can
cause an ESD event that might destroy unprotected ICs.
These new ESD structures protect the device whether or not
it is powered-up, protect without allowing any latchup
mechanism to activate, and don’t interfere with RS-232
signals as large as ±25V.
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5kΩ current limiting resistor,
making the test less severe than the IEC61000 test which
utilizes a 330Ω limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on “E” family
devices can withstand HBM ESD events to ±15kV.
IEC61000-4-2 Testing
The IEC61000-4-2 test method applies to finished
equipment, rather than to an individual IC. Therefore, the
pins most likely to suffer an ESD event are those that are
exposed to the outside world (the RS-232 pins in this case),
and the IC is tested in its typical application configuration
(power applied) rather than testing each pin-to-pin
combination. The lower current limiting resistor coupled with
the larger charge storage capacitor yields a test that is much
more severe than the HBM test. The extra ESD protection
built into this device’s RS-232 pins allows the design of
equipment meeting level 4 criteria without the need for
additional board level protection on the RS-232 port.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the
IC pin until the voltage arcs to it. The current waveform
delivered to the IC pin depends on approach speed,
humidity, temperature, etc., so it is difficult to obtain
repeatable results. The “E” device RS-232 pins withstand
±15kV air-gap discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. All “E” family devices survive ±8kV contact
discharges on the RS-232 pins.
TABLE 3. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
SYSTEM
POWER-SUPPLY
VOLTAGE
(V)
V
CC
SUPPLY
VOLTAGE
(V) COMPATIBILITY
3.3 3.3 Compatible with all CMOS
families.
5 5 Compatible with all TTL and
CMOS logic families.
5 3.3 Compatible with ACT and HCT
CMOS, and with TTL. ISL4221E,
ISL4223E and ISL3232E outputs
are incompatible with AC, HC,
and CD4000 CMOS inputs.
ISL3232E, ISL4221E, ISL4223E
12
FN6045.6
May 13, 2010
Typical Performance Curves V
CC
= 3.3V, T
A
= +25°C
FIGURE 12. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
FIGURE 13. SLEW RATE vs LOAD CAPACITANCE
FIGURE 14. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 15. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 16. SUPPLY CURRENT vs SUPPLY VOLTAGE
Die Characteristics
SUBSTRATE AND QFN THERMAL PAD POTENTIAL
(POWERED UP):
GND
TRANSISTOR COUNT:
ISL3232E: 296
ISL4221E: 286
ISL4223E: 357
PROCESS:
Si Gate CMOS
-6
-4
-2
0
2
4
6
1000 2000 3000 4000 50000
LOAD CAPACITANCE (pF)
TRANSMITTER OUTPUT VOLTAGE (V)
1 TRANSMITTER AT 250kbps
V
OUT
+
V
OUT
-
OTHER TRANSMITTERS AT 30kbps
LOAD CAPACITANCE (pF)
SLEW RATE (V/µs)
0 1000 2000 3000 4000 5000
5
10
15
20
25
+SLEW
-SLEW
0
5
10
15
20
25
30
45
35
40
0 1000 2000 3000 4000 5000
LOAD CAPACITANCE (pF)
SUPPLY CURRENT (mA)
20kbps
250kbps
120kbps
ISL4221E
0
5
10
15
20
25
30
45
35
40
0 1000 2000 3000 4000 5000
LOAD CAPACITANCE (pF)
SUPPLY CURRENT (mA)
20kbps
250kbps
120kbps
ISL4223E/ISL3232E
SUPPLY CURRENT (mA)
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
0
0.5
1.0
1.5
2.0
SUPPLY VOLTAGE (V)
2.5
3.0
3.5
NO LOAD
ALL OUTPUTS STATIC
ISL3232E, ISL4221E, ISL4223E

ISL3232EIRZ-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
RS-232 Interface IC 3V RS-232 2TX/2RX TRANSC 16LD 5X5
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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