© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 5
1 Publication Order Number:
MC10H646/D
MC10H646, MC100H646
PECL/TTL−TTL 1:8 Clock
Distribution Chip
Description
The MC10H/100H646 is a single supply, low skew translating 1:8
clock driver. Devices in the ON Semiconductor H646 translator series
utilize the 28−lead PLCC for optimal power pinning, signal flow
through and electrical performance. The single supply H646 is similar
to the H643, which is a dual supply 1:8 version of the same function.
The H646 was designed specifically to drive series terminated
transmission lines. Special techniques were used to match the HIGH
and LOW output impedances to about 7.0 W. This simplifies the
choice of the termination resistor for series terminated applications. To
match the HIGH and LOW output impedances, it was necessary to
remove the standard I
OS
limiting resistor. As a result, the user should
take care in preventing an output short to ground as the part will be
permanently damaged.
The H646 device meets all of the requirements for driving the
60 MHz and 66 MHz Intel Pentium® Microprocessor. The device has
no PLL components, which greatly simplifies its implementation into
a digital design. The eight copies of the clock allows for
point−to−point clock distribution to simplify board layout and
optimize signal integrity.
The H646 provides differential PECL inputs for picking up LOW
skew PECL clocks from the backplane and distributing it to TTL loads
on a daughter board. When used in conjunction with the
MC10/100E111, very low skew, very wide clock trees can be
designed. In addition, a TTL level clock input is provided for
flexibility. Note that only one of the inputs can be used on a single
chip. For correct operation, the unused input pins should be left open.
The Output Enable pin forces the outputs into a high impedance
state when a logic 0 is applied.
The output buffers of the H646 can drive two series terminated,
50 W transmission lines each. This capability allows the H646 to drive
up to 16 different point−to−point clock loads. Refer to the
Applications section for a more detailed discussion in this area.
The 10H version is compatible with MECL™ 10H ECL logic levels.
The 100H version is compatible with 100K levels.
Features
• PECL/TTL−TTL Version of Popular ECLinPS™ E111
• Low Skew
• Guaranteed Skew Spec
• Tri−State Enable
• Differential Internal Design
• V
BB
Output
• Single Supply
• Extra TTL and ECL Power/Ground Pins
• Matched High and Low Output Impedance
• Meets Specifications Required to Drive
Intel® Pentium® Microprocessors
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING DIAGRAM*
xxx = 10 or 100
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G= Pb−Free Package
PLCC−28
FN SUFFIX
CASE 776
MCxxxH646G
AWLYYWW
1
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
