LT1767/LT1767-1.8/
LT1767-2.5/LT1767-3.3/LT1767-5
16
1767fb
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applicaTions inForMaTion
The ramp is linear and rise times in the order of 100ms are
possible. Since the circuit is voltage controlled, the ramp
rate is unaffected by load characteristics and maximum
output current is unchanged. Variants of this circuit can
be used for sequencing multiple regulator outputs.
Dual Output SEPIC Converter
The circuit in Figure 11 generates both positive and negative
5V outputs with a single piece of magnetics. The two in
-
ductors shown
are
actually just two windings on a standard
B H Electronics inductor. The topology for the 5V output
is a standard buck converter. The – 5V topology would be
a simple flyback winding coupled to the buck converter
if C4 were not present. C4 creates a SEPIC (single-ended
primary inductance converter) topology which improves
regulation and reduces ripple current in L1. Without C4,
the voltage swing on L1B compared to L1A would vary
due to relative loading and coupling losses. C4 provides a
low impedance path to maintain an equal voltage swing in
L1B, improving regulation. In a flyback converter, during
switch on time, all the converter’s energy is stored in L1A
only, since no current flows in L1B
. At switch off, energy
is
transferred by magnetic coupling into L1B, powering
the –5V rail. C4 pulls L1B positive during switch on time,
causing current to flow, and energy to build in L1B and
C4. At switch off, the energy stored in both L1B and C4
supply the –5V rail. This reduces the current in L1A and
changes L1B current waveform from square to triangular.
For details on this circuit, including maximum output
currents, see Design Note 100.
3.3V, 1A
* ONLY REQUIRED IF INPUT CAN SINK >10mA
REMOVABLE
INPUT
0.1µF
1.5nF
83k
UPS120
1767 F09
2.2µF
UPS120*
CMDSH-3
5µH
10µF
BOOST
LT1767-3.3
V
IN
V
SW
FBSHDN
GND
V
C
SYNC
ALTERNATE
SUPPLY
28.5k
4.7k
Figure 10. Buck Converter with Adjustable Soft-Start
BOOST
LT1767-5
V
IN
OUTPUT
5V
1A
V
IN
12V
1767 F10
C2
0.1µF
C1
100µF
C
SS
15nF
C
C
330pF
D1
C3
2.2µF
D2
CMDSH-3
L1
5µH
R3
2k
V
SW
FB
SHDN
GND
V
C
SYNC
+
R4
47k
Q1
D1: UPS120
Q1: 2N3904
OUTPUT
5V
OUTPUT
–5V
†
* L1 IS A SINGLE CORE WITH TWO WINDINGS
BH ELECTRONICS #511-1013
†
IF LOAD CAN GO TO ZERO,
AN OPTIONAL PRELOAD OF 1k TO 5k
MAY BE USED TO IMPROVE LOAD REGULATION
D1, D3: UPS120
V
IN
6V
TO 15V
GND
1767 F11
C2
0.1µF
C
C
330pF
D1
C1
100µF
10V TANT
C5
100µF
10V TANT
C3
2.2µF
16V
CERAMIC
C4
2.2µF
16V
CERAMIC
D2
CMDSH-3
D3
L1A*
9µH
L1B*
+
+
BOOST
LT1767-5
V
IN
V
SW
FBSHDN
GND
V
C
SYNC
Figure 11. Dual Output SEPIC Converter
Figure 9. Dual Source Supply with 6µA Reverse Leakage
