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AC TIMING PARAMETERS & SPECIFICATIONS
DQS, DQS# differential READ Postamble
DQS, DQS# output high time
DQS, DQS# output low time
DQS, DQS# WRITE Postamble
DQS, DQS# rising edge output access time from rising CK,
CK#
DQS, DQS# low-impedance time (Referenced from
RL-1)
DQS, DQS# high-impedance time (Referenced from RL+BL/ 2)
DQS, DQS# differential input low pulse width
DQS, DQS# differential input high pulse width
DQS, DQS# rising edge to CK, CK# rising edge
DQS,DQS# failing edge setup time to CK, CK# rising edge
DQS,DQS# failing edge hold time to CK, CK# rising edge
Command and Address Timing
Internal READ Command to PRECHARGE Command delay
Delay from start of internal write transaction to internal read
command
Mode Register Set command cycle time
Mode Register Set command update delay
CAS# to CAS# command delay
Auto precharge write recovery + precharge time
WR + roundup (tRP / tCK(AVG))
Multi-Purpose Register Recovery Time
ACTIVE to PRECHARGE command period
ACTIVE to internal read or write delay time
ACTIVE to ACTIVE or REF command period
ACTIVE to ACTIVE command period for 1KB page size
ACTIVE to ACTIVE command period for 2KB page size
Four activate window for 1KB page size
Four activate window for 2KB page size
Command and Address setup time to CK, CK# referenced to
Vih(ac) / Vil(ac) levels
Command and Address setup time to CK, CK# referenced to
Vih(ac) / Vil(ac) levels
Command and Address hold time from CK, CK# referenced to
Vih(ac) / Vil(ac) levels
Control & Address Input pulse width for each input
