General Description
The MAX5940A/MAX5940B/MAX5940C/MAX5940D pro-
vide complete interface function for a powered device
(PD) to comply with the IEEE 802.3af standard in a
power-over-ethernet system. MAX5940A/MAX5940B/
MAX5940C/MAX5940D provide the PD with a detection
signature, a classification signature, and an integrated
isolation switch with programmable inrush current control.
These devices also feature power-mode undervoltage
lockout (UVLO) with wide hysteresis and power-
good outputs. The MAX5940A/MAX5940B are available
with an absolute maximum rating of 80V and the
MAX5940C/MAX5940D are rated for an absolute maxi-
mum rating of 90V.
An integrated MOSFET provides PD isolation during
detection and classification. All devices guarantee a leak-
age current offset of less than 10µA during the detection
phase. A programmable current limit prevents high inrush
current during power-on. The device features power-
mode UVLO with wide hysteresis and long deglitch time
to compensate for twisted-pair cable resistive drop and to
assure glitch-free transition between detection, classifica-
tion, and power-on/-off phases.
The MAX5940A/MAX5940C provide an active-high
(PGOOD) open-drain output and a fixed UVLO threshold.
The MAX5940B/MAX5940D provide both active-high
(PGOOD) and active-low (PGOOD) outputs and have an
adjustable UVLO threshold with the default value compli-
ant to the 802.3af standard. All devices are designed to
work with or without an external diode bridge.
The MAX5940A/MAX5940B/MAX5940C/MAX5940D are
available in 8-pin SO packages and are rated over the
extended temperature range of -40°C to +85°C.
Applications
IP Phones Security Cameras
Wireless Access Nodes IEEE 802.3af Power Devices
Computer Telephony
Features
Fully Integrated IEEE 802.3af-Compliant PD
Interface
PD Detection and Programmable Classification
Signatures
Less than 10µA Leakage Current Offset During
Detection
Integrated MOSFET For Isolation and Inrush
Current Limiting
90V Absolute Maximum Rating
(MAX5940C/MAX5940D)
Gate Output Allows External Control of the
Internal Isolation MOSFET
Programmable Inrush Current Control
Programmable Undervoltage Lockout
(MAX5940B/MAX5940D Only)
Wide UVLO Hysteresis Accommodates Twisted-
Pair Cable Voltage Drop
PGOOD/PGOOD Outputs to Enable Downstream
DC-DC Converters
-40°C to +85°C Operating Temperature Range
MAX5940A/MAX5940B/MAX5940C/MAX5940D
IEEE 802.3af PD Interface Controller
For Power-Over-Ethernet
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
60V
68nF
GND
V
EE
GATE
RCLASS
PGOOD
DC-DC CONVERTER
GND
-48V
R
CL
*OPTIONAL.
GND
V+
LOAD
V
REG
D1*
OUT
2
3
4
5
6
8
C
OUT
C
GATE
R
DISC
25.5kΩ
SS_SHDN
MAX5014
MAX5940A
MAX5940C
D2*
Typical Operating Circuits
19-2991; Rev 2; 2/06
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
Pin Configurations appear at end of data sheet.
PART
TEMP RANGE
PIN-
PACKAGE
UVLO
MAX5940AESA
-40°C to +85°C
8 SO Fixed
MAX5940BESA
-40°C to +85°C
8 SO
Adjustable
MAX5940CESA
-40°C to +85°C
8 SO Fixed
MAX5940DESA
-40°C to +85°C
8 SO
Adjustable
Typical Operating Circuits continued at end of data sheet.
MAX5940A/MAX5940B/MAX5940C/MAX5940D
IEEE 802.3af PD Interface Controller
For Power-Over-Ethernet
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
IN
= (GND - V
EE
) = 48V, GATE = PGOOD = PGOOD = OUT = OPEN, UVLO = V
EE
, T
A
= -40°C to +85°C, unless otherwise noted.
Typical values are at T
A
= +25°C. All voltages are referenced to V
EE
, unless otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages are referenced to V
EE
, unless otherwise noted.)
GND (MAX5940A/MAX5940B) ...............................-0.3V to +80V
GND (MAX5940C/MAX5940D)...............................-0.3V to +90V
OUT, PGOOD ...........................................-0.3V to (GND + 0.3V)
RCLASS, GATE ......................................................-0.3V to +12V
UVLO ........................................................................-0.3V to +8V
PGOOD to OUT.........................................-0.3V to (GND + 0.3V)
Maximum Input/Output Current (continuous)
OUT to V
EE
...................................................................500mA
GND, RCLASS to V
EE
.....................................................70mA
UVLO, PGOOD, PGOOD to V
EE
.....................................20mA
GATE to V
EE
....................................................................80mA
Continuous Power Dissipation (T
A
= +70°C)
8-Pin SO (derate 5.9mW/°C above +70°C)..................470mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) ................................+300°C
PARAMETER
SYMBOL
CONDITIONS MIN
MAX
UNITS
DETECTION MODE
Input Offset Current (Note 2)
I
OFFSET
V
IN
= 1.4V to 10.1V 10 µA
Effective Differential Input
Resistance (Note 3)
dR
V
IN
= 1.4V up to 10.1V with 1V step,
OUT = PGOOD = GND
550
kΩ
CLASSIFICATION MODE
Classification Current Turn-Off
Threshold (Note 4)
V
TH
,
CLSS
V
IN
rising
20.8 21.8 22.5
V
Class 0, R
CL
= 10kΩ 02
Class 1, R
CL
= 732Ω
9.17 11.83
Class 2, R
CL
= 392Ω
17.29 19.71
Class 3, R
CL
= 255Ω
26.45 29.55
Classification Current (Notes 5, 6) I
CLASS
V
IN
= 12.6V to
20V, R
DISC
=
25.5kΩ
Class 4, R
CL
= 178Ω
36.6 41.4
mA
POWER MODE
Operating Supply Voltage V
IN
V
IN
= (GND - V
EE
)67V
Operating Supply Current I
IN
Measure at GND, not including R
DISC
0.4 1
mA
MAX5940A/MAX5940C
34.3 35.4 36.6
Default Power Turn-On Voltage
V
UVLO
,
ON
V
IN
increasing
MAX5940B/MAX5940D,
UVLO = V
EE
37.4 38.6 39.9
V
Default Power Turn-Off Voltage
V
UVLO
,
OFF
V
IN
decreasing, UVLO = V
EE
for
MAX5940B/MAX5940D
30 V
MAX5940A/MAX5940C 4.2
Default Power Turn-On/Off
Hysteresis
V
HYST,
UVLO
MAX5940B/MAX5940D, UVLO = V
EE
7.4
V
External UVLO Programming
Range
V
IN,EX
Set UVLO externally (MAX5940B/
MAX5940D only) (Note 7)
12 67 V
UVLO External Reference Voltage
V
REF
,
UVLO
2.400 2.460 2.522
V
UVLO External Reference Voltage
Hysteresis
HYST Ratio to V
REF,UVLO
19.2
20
20.9
%
UVLO Bias Current I
UVLO
UVLO = 2.460V -1.5
+1.5
µA
MAX5940A/MAX5940B/MAX5940C/MAX5940D
IEEE 802.3af PD Interface Controller
For Power-Over-Ethernet
_______________________________________________________________________________________ 3
Note 1: All min/max limits are production tested at +85°C. Limits at +25°C and -40°C are guaranteed by design.
Note 2: The input offset current is illustrated in Figure 1.
Note 3: Effective differential input resistance is defined as the differential resistance between GND and V
EE
without any external
resistance. See Figure 1.
Note 4: Classification current is turned off whenever the IC is in power mode.
Note 5: See Table 2 in the PD Classification Mode section. R
DISC
and R
CL
must be ±1%, 100ppm or better. I
CLASS
includes the IC
bias current and the current drawn by R
DISC
.
Note 6: See the Thermal Dissipation section for details.
Note 7: When UVLO is connected to the midpoint of an external resistor-divider with a series resistance of 25.5kΩ (±1%), the turn-
on threshold set-point for the power mode is defined by the external resistor-divider. Make sure the voltage on the UVLO
pin does not exceed its maximum rating of 8V when V
IN
is at the maximum voltage (MAX5940B only).
Note 8: When the UVLO input voltage is below V
TH,G,UVLO,
the MAX5940B sets the UVLO threshold internally.
Note 9: An input voltage or V
UVLO
glitch below their respective thresholds shorter than or equal to t
OFF_DLY
does not cause the
MAX5940A/MAX5940B/MAX5940C/MAX5940D to exit power-on mode (as long as the input voltage remains above an opera-
ble voltage level of 12V).
Note 10: Guaranteed by design.
Note 11: PGOOD references to OUT while PGOOD references to V
EE
.
PARAMETER
SYMBOL
CONDITIONS MIN
TYP MAX
UNITS
UVLO Input Ground Sense
Threshold (Note 8)
V
TH
,
G
,
UVLO
50 440
mV
UVLO Input Ground Sense Glitch
Rejection
UVLO = V
EE
s
Power Turn-Off Voltage,
Undervoltage Lockout Deglitch
Time (Note 9)
t
OFF_DLY
V
IN
, V
UVLO
falling
0.32
ms
T
A
= +25°C
(Note 10)
0.6 1.1
Isolation Switch N-Channel
MOSFET On-Resistance
R
ON
Output current =
300mA, V
GATE
= 6V,
measured between
OUT and V
EE
T
A
= +85°C 0.8 1.5
Ω
Isolation Switch N-Channel
MOSFET Off-Threshold Voltage
V
GSTH
OUT = GND, V
GATE
- V
EE,
output current
< 1µA
0.5 V
GATE Pulldown Switch Resistance
R
G
Power-off mode, V
IN
= 12V,
UVLO = V
EE
for MAX5940B
38 80 Ω
GATE Charging Current I
G
V
GATE
= 2V 5 10 15 µA
GATE High Voltage V
GATE
I
GATE
= 1µA
5.59 5.76 5.93
V
V
OUT
- V
EE
, |V
OUT
- V
EE
| decreasing,
V
GATE
= 5.75V
1.16 1.23 1.31
V
PGOOD, PGOOD Assertion V
OUT
Threshold
V
OUTEN
Hysteresis 70
mV
(GATE - V
EE
) increasing, OUT = V
EE
4.62 4.76 4.91
V
PGOOD, PGOOD Assertion V
GATE
Threshold
V
GSEN
Hysteresis 80
mV
PGOOD, PGOOD Output Low
Voltage (Note 11)
V
OLDCDC
I
SINK
= 2mA; for PGOOD, OUT
(GND - 5V)
0.4 V
PGOOD Leakage Current (Note 11)
GATE = high, GND - V
OUT
= 67V 1 µA
PGOOD Leakage Current (Note 11)
GATE = V
EE
, PGOOD - V
EE
= 67V 1 µA
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= (GND - V
EE
) = 48V, GATE = PGOOD = PGOOD = OUT = OPEN, UVLO = V
EE
, T
A
= -40°C to +85°C, unless otherwise noted.
Typical values are at T
A
= +25°C. All voltages are referenced to V
EE
, unless otherwise noted.) (Note 1)

MAX5940AESA+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
I/O Controller Interface IC IEEE 802.3af PD Int Controller
Lifecycle:
New from this manufacturer.
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