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MAX15011ATJ+

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
MAX15009/MAX15011
Leave CT open to select a typical reset timeout of 19µs.
To maintain reset accuracy, use a low-leakage type of
capacitor.
Setting the Switch Current Limit
The switch block features accurate current-limit sens-
ing circuitry. A resistor connected from ILIM to SGND
can be used to select the current-limit threshold using
the following relationship:
I
SW_LIM
(mA) = R
ILIM
(kΩ) x 1mA / kΩ
where 20kΩ ≤ R
ILIM
≤ 200kΩ.
Connect ILIM to OUT_LDO to select the default current
limit of 200mA (typ).
Programming the Switch
Overcurrent Blanking Time
The switch provides an adjustable overcurrent blanking
time to allow the safe charge of large capacitive loads.
When an overcurrent event is detected, a delay period
elapses before the condition is latched and the internal
MOSFET is turned off. This period is the overcurrent
delay, t
OC_DELAY
. Set the overcurrent delay using the
following equation:
t
OC_DELAY
= C
OC_DELAY
x V
OC_DELAY
/ I
OC_DELAY_UP
where t
OC_DELAY
is in seconds and C
OC_DELAY
is in
µF. V
OC_DELAY
is the overcurrent delay timeout thresh-
old voltage in volts and I
OC_DELAY_UP
is the overcur-
rent delay timeout pullup current in µA as seen in the
Electrical Characteristics
table.
Ensure that the switch is not disabled due to a large
startup inrush current by selecting a large enough
value for overcurrent blanking time. Assume that the
current available for charging the total switch output
capacitance, C
OUT_SW
, is the difference between the
current-limit threshold value, I
SW_LIM
, and the nominal
DC load current at OUT_SW, I
OUT_SW_NOM
and select
the C
OC_DELAY
using the following relationship:
C
OC_DELAY
also affects the length of time before the
MAX15009/MAX15011 attempt to turn the switch back
on. Set the autoretry delay using the following equation:
t
OC_RETRY
= C
OC_DELAY
x
V
OC_DELAY
/I
OC_DELAY_DOWN
where t
OC_RETRY
is in seconds, C
OC_DELAY
is in µF,
V
OC_DELAY
is in volts, and I
OC_DELAY_DOWN
is in µA.
C
OC_DELAY
should be a low-leakage type of capacitor
with a minimum value of 100pF.
Setting the Overvoltage Threshold
(MAX15009 Only)
The MAX15009 provides an accurate means to set the
overvoltage threshold for the OVP controller using
FB_PROT. Use a resistive voltage-divider to set the
desired overvoltage threshold (Figure 4). FB_PROT has
a rising 1.235V threshold with a 4% falling hysteresis.
Begin by selecting the total end-to-end resistance,
R
TOTAL
= R
3
+ R
4
. Choose R
TOTAL
to yield a total current
equivalent to a minimum of 100 x I
FB_PROT
(FB_PROT’s
input maximum bias current) at the desired overvoltage
threshold. See the
Electrical Characteristics
table.
For example:
With an overvoltage threshold (V
OV
) set to 20V, R
TOTAL
< 20V / (100 x I
FB_PROT
), where I
FB_PROT
is FB_PROT’s
maximum 100nA bias current:
R
TOTAL
< 2MΩ
C
IVC
V(II )
OC_DELAY
OC_DELAY_UP OUT_LDO OUT_SW
OC_DELAY SW_LIM OUT_SW_NOM
≥
××
×−
Automotive 300mA LDO Regulators with
Switched Output and Overvoltage Protector
16 ______________________________________________________________________________________
R4
R3
R5
R6
IN
V
IN
FB_PROT
SGND
GATE
SOURCE
PROTECTOR
OUTPUT
MAX15009
IN
V
IN
FB_PROT
SGND
GATE
SOURCE
PROTECTOR
OUTPUT
MAX15009
Figure 4. Setting the Overvoltage Threshold (MAX15009)
Use the following formula to calculate R
4
:
R
4
= V
TH_PROT
x R
TOTAL
/ V
OV
where V
TH_PROT
is the 1.235V FB_PROT rising threshold
and V
OV
is the desired overvoltage threshold. R
4
= 124kΩ:
R
TOTAL
= R
3
+ R
4
where R
3
= 1.88MΩ. Use a standard 1.87MΩ resistor.
A lower value for total resistance dissipates more
power, but provides better accuracy and robustness
against external disturbances.
Input Transients Clamping
When the external MOSFET is turned off during an
overvoltage event, stray inductance in the power path
may cause additional input-voltage spikes that exceed
the V
DSS
rating of the external MOSFET or the absolute
maximum rating for the MAX15009. Minimize stray
inductance in the power path using wide traces and
minimize the loop area included by the power traces
and the return ground path.
For further protection, add a zener diode or transient
voltage suppressor (TVS) rated below the absolute
maximum rating limits (Figure 5).
External MOSFET Selection
Select the external MOSFET with adequate voltage rating,
V
DSS
, to withstand the maximum expected load-dump
input voltage. The on-resistance of the MOSFET,
R
DS(ON)
, should be low enough to maintain a minimal
voltage drop at full load, limiting the power dissipation
of the MOSFET.
During regular operation, the power dissipated by the
MOSFET is:
P
NORMAL
= I
LOAD
2
x R
DS(ON)
Normally, this power loss is small and is safely handled
by the MOSFET. However, when operating the
MAX15009 in overvoltage limiter mode under pro-
longed or frequent overvoltage events, select an exter-
nal MOSFET with an appropriate power rating.
During an overvoltage event, the power dissipation in
the external MOSFET is proportional to both load cur-
rent and to the drain-source voltage, resulting in high
power dissipated in the MOSFET (Figure 6). The power
dissipated across the MOSFET is:
P
OV_LIMITER
= V
Q1
x I
LOAD
where V
Q1
is the voltage across the MOSFET’s drain
and source during overvoltage limiter operation, and
I
LOAD
is the load current.
MAX15009/MAX15011
Automotive 300mA LDO Regulators with
Switched Output and Overvoltage Protector
______________________________________________________________________________________ 17
IN
V
IN
SGND
GATE
SOURCE
TVS
MAX15009
LOAD
Figure 5. Protecting the MAX15009 Input from High-Voltage
Transients
IN
FB_PROT
SGND
GATE
SOURCE
TVS
MAX15009
LOAD
I
LOAD
+ V
Q1
-
V
SOURCE
V
SOURCE
V
OV
V
MAX
Figure 6. Power Dissipated Across MOSFETs During an
Overvoltage Fault (Overvoltage Limiter Mode)
MAX15009/MAX15011
Overvoltage-Limiter Mode
Switching Frequency
When the MAX15009 is configured in overvoltage-
limiter mode, the external n-channel MOSFET is subse-
quently switched on and off during an overvoltage
event. The output voltage at OUT_PROT resembles a
periodic sawtooth waveform. Calculate the period of
the waveform, t
OVP
, by summing three time intervals
(Figure 7):
t
OVP
= t
1
+ t
2
+ t
3
where t
1
is the V
SOURCE
output discharge time, t
2
is the
GATE delay time, and t
3
is the V
SOURCE
output charge
time.
During an overvoltage event, the power dissipated
inside the MAX15009 is due to the gate pulldown cur-
rent, I
GATEPD
. This amount of power dissipation is
worse when I
SOURCE
= 0 (C
SOURCE
is discharged only
by the internal current sink).
The worst-case internal power dissipation contribution
in overvoltage limiter mode, P
OVP
, in watts can be
approximated using the following equation:
where V
OV
is the overvoltage threshold voltage in volts
and I
GATEPD
is 100mA (max) GATE pulldown current.
Output Discharge Time (t
1
)
When the voltage at SOURCE exceeds the adjusted
overvoltage threshold, GATE’s internal pulldown is
enabled until V
SOURCE
drops by 4%. The internal cur-
rent sink, I
GATEPD
, and the external load current,
I
LOAD
, discharge the external capacitance from
SOURCE to ground.
Calculate the discharge time, t
1
, using the following
equation:
where t
1
is in ms, V
OV
is the adjusted overvoltage
threshold in volts, I
LOAD
is the external load current in
mA, and I
GATEPD
is the 100mA (max) internal pulldown
current of GATE. C
SOURCE
is the value of the capacitor
connected between the source of the MOSFET and
PGND in µF.
GATE Delay Time (t
2
)
When SOURCE falls 4% below the overvoltage-threshold
voltage, the internal current sink is disabled and the
internal charge pump begins recharging the external
GATE voltage. Due to the external load, the SOURCE
voltage continues to drop until the gate of the MOSFET is
recharged. The time needed to recharge GATE and re-
enhance the external MOSFET is approximately:
where t
2
is in µs, C
iss
is the input capacitance of the
MOSFET in pF, and V
GS(TH)
is the GATE-to-SOURCE
threshold voltage of the MOSFET in volts. V
F
is the 0.7V
(typ) internal clamp diode forward voltage of the MOS-
FET in volts, and I
GATE
is the charge-pump current
45µA (typ). Any external capacitance between GATE
and PGND adds up to C
iss
.
During t
2
, the SOURCE capacitance, C
SOURCE
, loses
charge through the output load. The voltage across
C
SOURCE
, ΔV
2
, decreases until the MOSFET reaches
its V
GS(TH)
threshold. Approximate ΔV
2
using the fol-
lowing formula:
SOURCE Output Charge Time (t
3
)
Once the GATE voltage exceeds the GATE-to-SOURCE
threshold, V
GS(TH)
, of the external MOSFET, the MOS-
FET turns on and the charge through the internal
charge pump with respect to the drain potential, Q
G
,
determines the slope of the output voltage rise. The
time required for the SOURCE voltage to rise again to
the overvoltage threshold is:
t
CV
I
rss SOURCE
GATE
3
=
×Δ
ΔV
It
C
LOAD
SOURCE
2
2
=
×
tC
VV
I
iss
GS TH F
GATE
2
=×
+
()
tC
0.04 V
II
1 SOURCE
OV
LOAD GATEPD
=×
×
+
PV I
t
t
OVP OV GATEPD
OVP
=×× ×098
1
.
Automotive 300mA LDO Regulators with
Switched Output and Overvoltage Protector
18 ______________________________________________________________________________________
t
2
t
1
t
OVP
t
3
GATE
SOURCE
Figure 7. MAX15009 Timing Diagram
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24

MAX15011ATJ+

Mfr. #:
Buy MAX15011ATJ+
Manufacturer:
Maxim Integrated
Description:
LDO Voltage Regulators Automotive 300mA w/Switched Output
Lifecycle:
New from this manufacturer.
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