7
LT1072
1072fc
The LT1072 is a current mode switcher. This means that
switch duty cycle is directly controlled by switch current
rather than by output voltage. Referring to the block
diagram, the switch is turned “on” at the start of each
oscillator cycle. It is turned “off” when switch current
reaches a predetermined level. Control of output voltage is
obtained by using the output of a voltage sensing error
amplifier to set current trip level. This technique has
several advantages. First, it has immediate response to
input voltage variations, unlike ordinary switchers which
have notoriously poor line transient response. Second, it
reduces the 90 phase shift at midfrequencies in the energy
storage inductor. This greatly simplifies closed loop fre-
quency compensation under widely varying input voltage
or output load conditions. Finally, it allows simple pulse-
by-pulse current limiting to provide maximum switch
protection under output overload or short conditions. A
low-dropout internal regulator provides a 2.3V supply for
all internal circuitry on the LT1072. This low-dropout
design allows input voltage to vary from 3V to 60V with
virtually no change in device performance. A 40kHz
oscillator is the basic clock for all internal timing. It turns
“on” the output switch via the logic and driver circuitry.
Special adaptive antisat circuitry detects onset of
saturation in the power switch and adjusts driver current
instantaneously to limit switch saturation. This minimizes
driver dissipation and provides very rapid turn-off of
the switch.
A 1.2V bandgap reference biases the positive input of the
error amplifier. The negative input is brought out for
output voltage sensing. This feedback pin has a second
function; when pulled low with an external resistor, it
programs the LT1072 to disconnect the main error
amplifier output and connects the output of the flyback
amplifier to the comparator input. The LT1072 will then
regulate the value of the flyback pulse with respect to the
supply voltage. This flyback pulse is directly proportional
to output voltage in the traditional transformer coupled
flyback topology regulator. By regulating the amplitude of
the flyback pulse, the output voltage can be regulated with
no direct connection between input and output. The output
is fully floating up to the breakdown voltage of the
transformer windings. Multiple floating outputs are easily
obtained with additional windings. A special delay network
inside the LT1072 ignores the leakage inductance spike at
the leading edge of the flyback pulse to improve output
regulation.
The error signal developed at the comparator input is
brought out externally. This pin (V
C
) has four different
functions. It is used for frequency compensation, current
limit adjustment, soft starting, and total regulator
shutdown. During normal regulator operation this pin sits
at a voltage between 0.9V (low output current) and 2.0V
(high output current). The error amplifiers are current
output (gm) types, so this voltage can be externally
clamped for adjusting current limit. Likewise, a capacitor
coupled external clamp will provide soft start. Switch duty
cycle goes to zero if the V
C
pin is pulled to ground through
a diode, placing the LT1072 in an idle mode. Pulling the V
C
pin below 0.15V causes total regulator shutdown, with
only 50µA
supply current for shutdown circuitry biasing.
See AN-19 for full application details.
Extra Pins on the MiniDIP and Surface Mount Packages
The 8 and 16-pin versions of the LT1072 have the emitters
of the power transistor brought out separately from the
ground pin. This eliminates errors due to ground pin
voltage drops and allows the user to reduce switch current
limit 2:1 by leaving the second emitter (E2) disconnected.
The first emitter (E1) should always be connected to the
ground pin. Note that switch “on” resistance doubles
when E2 is left open, so efficiency will suffer somewhat
when switch currents exceed 100mA. Also, note that chip
dissipation will actually
increase
with E2 open during
normal load operation, even though dissipation in current
limit mode will
decrease.
See “Thermal Considerations.”
Thermal Considerations When Using Small Packages
The low supply current and high switch efficiency of the
LT1072 allow it to be used without a heat sink in most
applications when the TO-220 or TO-3 package is selected.
These packages are rated at 50°C/W and 35°C/W
respectively. The small packages, however, are rated at
greater than 100°C/W. Care should be taken with these
packages to ensure that the worse case input voltage and
load current conditions do not cause excessive die
temperatures. The following formulas can be used as a
LT1072 OPERATIO
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8
LT1072
1072fc
rough guide to calculate LT1072 power dissipation. For
more details, the reader is referred to Application Note 19
(AN19), “Efficiency Calculations” section.
Average supply current (including driver current) is:
I
IN
6mA + I
SW
(0.004 + DC/40)
I
SW
= switch current
DC = switch duty cycle
Switch power dissipation is given by:
P
SW
= (I
SW
)
2
• R
SW
• DC
R
SW
= LT1072 switch “on” resistance (1 maximum)
Total power dissipation is the sum of supply current times
input voltage plus switch power:
P
TOT
= (l
lN
)(V
IN
) + P
SW
In a typical example, using a boost converter to generate
12V @ 0.12A from a 5V input, duty cycle is approximately
60%, and switch current is about 0.65A, yielding:
l
lN
= 6mA + 0.65(0.004 + DC/40) = 18mA
P
SW
= (0.65)
2
• 1 • (0.6) = 0.25W
P
TOT
= (5V)(0.018A) + 0.25 = 0.34W
Temperature rise in a plastic miniDIP would be 130°C/W
times 0.34W, or approximately 44°C. The maximum
ambient temperature would be limited to 100°C
(commercial temperature limit) minus 44°C, or 56°C.
In most applications, full load current is used to calculate
die temperature. However, if overload conditions must
also be accounted for, four approaches are possible. First,
if loss of regulated output is acceptable under overload
conditions, the internal
thermal limit
of the LT1072 will
protect the die in most applications by shutting off switch
current.
Thermal limit is not a tested parameter,
however,
and should be considered only for non-critical applications
with temporary overloads. A second approach is to use the
larger TO-220 (T) or TO-3 (K) package which, even without
a heat sink, may limit die temperatures to safe levels under
overload conditions. In critical situations, heat sinking
of these packages is required; especially if overload
conditions must be tolerated for extended periods of time.
The third approach for lower current applications is to
leave the second switch emitter open. This increases
switch “on” resistance by 2:1, but reduces switch current
limit by 2:1 also, resulting in a net 2:1 reduction in I
2
R
switch dissipation under current limit conditions.
The fourth approach is to clamp the V
C
pin to a voltage less
than its internal clamp level of 2V. The LT1072 switch
current limit is zero at approximately 1V on the V
C
pin and
2A at 2V on the V
C
pin. Peak switch current can be
externally clamped between these two levels with a diode.
See AN-19 for details.
LT1072 Synchronizing
The LT1072 can be externally synchronized in the frequency
range of 48kHz to 70kHz. This is accomplished as shown
in the accompanying figures. Synchronizing occurs when
the V
C
pin is pulled to ground with an external transistor.
To avoid disturbing the DC characteristics of the internal
error amplifier, the width of the synchronizing pulse
should be under 1µs. C2 sets the pulse width at 0.35µs.
The effect of a synchronizing pulse on the LT1072
amplifier offset can be calculated from:
KT
= 26mV at 25°C
q
t
S
= pulse width
f
S
= pulse frequency
I
C
= LT1072 V
C
source current ( 200µA)
V
C
= LT1072 operating V
C
voltage (1V to 2V)
R3 = resistor used to set mid-frequency “zero” in LT1072
frequency compensation network.
With t
S
= 0.35µs, f
S
= 50kHz, V
C
= 1.5V, and R3 = 2K,
offset voltage shift is 2.2mV. This is not particularly
bothersome, but note that high offsets could result
if R3 were reduced to a much lower value. Also, the
synchronizing transistor must sink higher currents with
low values of R3, so larger drives may have to be used. The
transistor must be capable of pulling the V
C
pin to within
200mV of ground to ensure synchronizing.
LT1072 OPERATIO
U
V
OS
=
(t
S
)(f
S
) I
C
+
I
C
KT
q
((
(
V
C
R3
(
9
LT1072
1072fc
Totally Isolated Converter
Synchronizing with Bipolar Transistor Synchronizing with MOS Transistor
FROM 5V
LOGIC
R1
3k
R2
2.2k
C2
68pF
V
IN
V
C
GND
LT1072
2N2369
R3
C1
LT1072 • OP01
FROM 5V
LOGIC
*SILICONIX OR EQUIVALENT
R2
2.2k
D2
1N4158
C2
200pF
D1
1N4158
V
IN
V
C
GND
LT1072
R3
C1
VN2222*
LT1072 • OP02
LT1072 OPERATIO
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C5
25µF*
R4
2.7k
C3
0.47µF
C2
0.01µF
1:N
D1
COM
15V
L1
10µH
OPTIONAL
OUTPUT FILTER
N
N
V
IN
5V
500
R2
*REQUIRED IF INPUT LEADS 2”
N = 0.875 = 7:8
FOR V
OUT
= 15V
5k
C1
200µF
C5
200µF
C6
200µF
C4
200µF
–15V
L2
10µH
V
IN
V
SW
FB
V
C
GND
LT1072
SWITCH VOLTAGE
V
OUT
+ V
f
(V
f
= DIODE FORWARD VOLTAGE)
t
OFF
t
ON
V
IN
0
0V
SECONDARY VOLTAGE
N • V
IN
16V
LT1072 • TA03
+
+
+
+
+
TYPICAL APPLICATIO S
U

LT1072HVCT#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 1.25A Hi Eff Sw Reg
Lifecycle:
New from this manufacturer.
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