DS786A2 19
CS4412A
4.5 Device Protection and Error Reporting
The CS4412A has built-in protection circuitry for over-current, under-voltage, and thermal warning/over-
load conditions. The levels of the over-current error, thermal error, and VP under-voltage trigger points
are listed in the PWM Power Output Characteristics table on page 6. Automatic shut-down occurs when-
ever any of these preset thresholds, other than thermal warning, are crossed.
Each error and warning pin implements an active-low open-drain driver and requires an external 22 k
pull-up resistor for proper operation.
4.5.1 Over-Current Protection
An over-current error condition occurs if the peak output current exceeds the Over-Current Error trigger
point. Over-current errors for OUT1/2 and OUT3/4 are reported on the ERROC12
and ERROC34 pins,
respectively. The power output of the channel that is reporting the over-current condition will be set to
high-impedance until the error condition has been removed and the reset signal for that channel has been
toggled from low to high.
4.5.2 Thermal Warning, Thermal Error, and Under-Voltage Error
Table 8 shows the behavior of the TWR and ERRUVTE pins. When the junction temperature exceeds the
junction thermal warning trigger point, the TWR
pin is set low. If the junction temperature continues to in-
crease beyond the junction thermal error trigger point, the ERRUVTE
pin will be set low. If the voltage on
VP falls below the VP under-voltage error trigger point, ERRUVTE
will be set low.
When the thermal error or VP under-voltage trigger point is crossed, all power outputs will be set in a high-
impedance state until the error condition has been removed and both the RST12
and RST34 signals have
been toggled from low to high.
ERROCxy
Reported Condition
0 Over-current error on channel x or channel y
1 Operating current of channel x and y within allowable limits
Table 7. Over-Current Error Conditions
TWR ERRUVTE Reported Condition
0 0 Thermal warning and thermal error and/or under-voltage error
0 1 Thermal warning only
1 0 Under-voltage error
1 1 Junction temperature and VP voltage within normal limits
Table 8. Thermal and Under-Voltage Error Conditions
20 DS786A2
CS4412A
5. POWER SUPPLY, GROUNDING, AND PCB LAYOUT
5.1 Power Supply and Grounding
The CS4412A requires careful attention to power supply and grounding arrangements if its potential perfor-
mance is to be realized.
Extensive use of power and ground planes, ground plane fill in unused areas, and surface mount decoupling
capacitors are recommended. It is necessary to decouple the power supply by placing capacitors directly
between the power and ground of the CS4412A. Decoupling capacitors should be as close to the pins of
the CS4412A as possible. The lowest value ceramic capacitor should be closest to the pin and should be
mounted on the same side of the board as the CS4412A to minimize inductance effects. The CRD4412A
reference design demonstrates the optimum layout and power supply arrangements.
5.1.1 Integrated VD Regulator
The CS4412A includes an internal linear regulator to provide a fixed 2.5 V supply from the VD supply volt-
age for its internal digital logic. The LVD pin must be set to indicate the voltage present on the VD pin as
shown in Table 9 below.
Table 9. Power Supply Configuration and Settings
The output of the digital regulator is presented on the VD_REG pin and may be used to provide an exter-
nal device with up to 3mA of current at its nominal output voltage of 2.5 V.
If a nominal supply voltage of 2.5 V is used as the VD supply (see the Recommended Operating Condi-
tions table on page 5), the VD and VD_REG must be connected to the VD supply source. In this config-
uration, the internal regulator is bypassed and the external supply source is used to directly drive the
internal digital logic.
5.2 QFN Thermal Pad
The CS4412A is available in a compact QFN package. The underside of the QFN package reveals a large
metal pad that serves as a thermal relief to provide for maximum heat dissipation. This pad must mate with
an equally dimensioned copper pad on the PCB and must be electrically connected to ground. A series of
thermal vias should be used to connect this copper pad to one or more larger ground planes on other PCB
layers; the copper in these ground planes will act as a heat sink for the CS4412A. The CRD4412A reference
design demonstrates the optimum thermal pad and via configuration.
VD Connection VD_REG Connection LVD Connection
5 V Supply Bypass Capacitors Only VD
3.3 V Supply Bypass Capacitors Only GND
2.5 V Supply VD and Bypass Capacitors GND
DS786A2 21
CS4412A
6. PARAMETER DEFINITIONS
Dynamic Range (DYR)
The ratio of the rms value of the signal to the rms sum of all other spectral components over the specified
bandwidth, typically 20 Hz to 20 kHz. Dynamic Range is a signal-to-noise ratio measurement over the spec-
ified band width made with a -60 dBFS signal; then, 60 dB is added to the resulting measurement to refer
the measurement to full-scale. This technique ensures that the distortion components are below the noise
level and do not effect the measurement. This measurement technique has been accepted by the Audio
Engineering Society, AES17-1991, and the Electronic Industries Association of Japan, EIAJ CP-307. Ex-
pressed in decibels.
Total Harmonic Distortion + Noise (THD+N)
The ratio of the rms value of the signal to the rms sum of all other spectral components over the specified
band width (typically 10 Hz to 20 kHz), including distortion components. Expressed in decibels. Measured
at -1 and -20 dBFS as suggested in AES17-1991 Annex A.

CS4412A-CNZR

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Audio Amplifiers IC 30W Qd Hlf-Brdg Dgtl Amp PWR Stage
Lifecycle:
New from this manufacturer.
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