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4
ELECTRICAL CHARACTERISTICS (EIA−423−A single−ended mode, Pin 4 2.0 V, −40°C T
A
85°C, 4.75 V V
CC
,
|V
EE
5.25 V, (Notes 1 and 3) unless otherwise noted).
Characteristic
Symbol Min Typ Max Unit
Output Voltage (V
CC
= V
EE
= 4.75 V)
Single−Ended Voltage, R
L
= (Figure 2)
Single−Ended Voltage, R
L
= 450 , (Figure 2)
Voltage Imbalance (Note 5), R
L
= 450
V
O1
V
O2
V
O2
4.0
3.6
4.2
3.95
0.05
6.0
6.0
0.4
Vdc
Slew Control Current (Pins 16, 13, 12, 9) I
SLEW
±120 µA
Output Current (Each Output)
Power Off Leakage, V
CC
= V
EE
= 0, −6.0 V V
O
+6.0 V
Short Circuit Current (Output Short to Ground, Note 2)
V
in
0.8 V (T
A
= 25°C)
V
in
0.8 V (−40°C T
A
+85°C)
V
in
2.0 V (T
A
= 25°C)
V
in
2.0 V (−40°C T
A
+85°C)
I
OLK
I
SC+
I
SC+
I
SC−
I
SC−
−100
60
50
−150
−150
0
80
−95
+100
150
150
−60
−50
µA
mA
Inputs
Low Level Voltage
High Level Voltage
Current @ V
in
= 2.4 V
Current @ V
in
= 15 V
Current @ V
in
= 0.4 V
Current, 0 V
in
15 V, V
CC
= 0
Clamp Voltage (I
in
= −12 mA)
V
IL
V
IH
I
IH
I
IHH
I
IL
I
IX
V
IK
2.0
−200
−1.5
0
0
8.0
0
0.8
40
100
Vdc
Vdc
µA
Vdc
Power Supply Current (Outputs Open)
V
CC
= +5.25 V, V
EE
= −5.25 V, V
in
= 0.4 V
I
CC
I
EE
−22
17
8.0
30
mA
TIMING CHARACTERISTICS (EIA−423−A single−ended mode, Pin 4 2.0 V, T
A
= 25°C, V
CC
= 5.0 V, V
EE
= −5.0 V, (Notes 1 and
3) unless otherwise noted.)
Characteristic
Symbol Min Typ Max Unit
Output Timing (Figure 5)
Output Rise Time, C
C
= 0
Output Fall Time, C
C
= 0
Output Rise Time, C
C
= 50 pF
Output Fall Time, C
C
= 50 pF
t
r
t
f
t
r
t
f
65
65
3.0
3.0
300
300
ns
µs
Rise Time Coefficient (Figure 16) C
rt
0.06 µs/pF
Propagation Delay Time, Input to Single Ended Output (Figure 5)
Input Low to High, C
C
= 0
Input High to Low, C
C
= 0
t
PDH
t
PDL
100
100
300
300
ns
Skew Timing, C
C
= 0 (Figure 5)
t
PDH
to t
PDL
for Each Driver
Max to Min t
PDH
Within a Package
Max to Min t
PDL
Within a Package
t
SK4
t
SK5
t
SK6
15
2.0
5.0
ns
1. All voltages measured with respect to Pin 5.
2. Only one output shorted at a time, for not more than 1 second.
3. Typical values established at +25°C, V
CC
= +5.0 V, V
EE
= −5.0 V.
4. V
in
switched from 0.8 to 2.0 V.
5. Imbalance is the difference between V
O2
with V
in
0.8 V and V
O2
with V
in
2.0 V.
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5
Table 1
Inputs Outputs
Operation V
CC
V
EE
Mode A B C D A B C D
Differential +5.0 Gnd 0 0 0 0 0 0 1 1 0
Differential
(EIA−422−A)
+5
.
0
Gnd
0
0
0
1
0
0
0
0
0
1
0
1
1
0
1
0
0
1
(EIA 422 A)
0
0
1
X
0
1
0
0
1
1
1
Z
0
Z
0
0
1
1
0
0
X
1
1
0
0
0
1
0
Z
1
Z
0
0
1
1
0
0
0
1
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
0
0
0
1
0
0
0
1
1
X
0
1
1
0
0
Z
1
Z
Single−Ended +5.0 −5.0 1 0 0 0 0 0 0 0 0
S g e ded
(EIA−423−A)
50
50
1
0
1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
(EIA 423 A)
1
1
1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
0
1
1
0
0
1
0
0
1
0
0
0
0
1
0
0
1
0
0
1
1
0
0
0
0
1
0
0
1
0
0
0
0
1
0
0
1
X 0 X X X X X X Z Z Z Z
X = Don’t Care
Z = High Impedance (Off)
Figure 1. Differential Output Test Figure 2. Single−Ended Output Test
V
EE
Mode = 0
V
OS
R
L
R
L
/2
R
L
/2
C
L
V
in
(0.8 or 2.0 V)
V
CC
V
O
V
CC
V
OD2
Mode = 1
V
in
(0.8 or 2.0 V)
Figure 3. Differential Mode Rise/Fall Time and Data Propagation Delay
NOTES:
1. S.G. set to: f 1.0 MHz; duty cycle = 50%; t
r
, t
f
, 10 ns.
2. t
SK1
= t
PDH
−t
PDL
for each driver.
3. t
SK2
computed by subtracting the shortest t
PDH
from the longest t
PDH
of the 2 drivers within a package.
4. t
SK3
computed by subtracting the shortest t
PDL
from the longest t
PDL
of the 2 drivers within a package.
10%
t
PDH
1.5 V
V
in
0 V
10%
50%
90%
t
f
t
PDL
t
r
90%
50%
V
out
1.5 V
+3.0 V
V
CC
V
in
S.G.
V
OD
500 pF
100
MC26LS30
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6
Figure 4. Differential Mode Enable Timing
NOTES:
1. S.G. set to: f 1.0 MHz; duty cycle = 50%; t
r
, t
f
, 10 ns.
2. Above tests conducted by monitoring output current levels.
Figure 5. Single−Ended Mode Rise/Fall Time and Data Propagation Delay
NOTES:
1. S.G. set to: f 100 kHz; duty cycle = 50%; t
r
, t
f
, 10 ns.
2. t
SK4
= t
PDH
−t
PDL
for each driver.
3. t
SK5
computed by subtracting the shortest t
PDH
from the longest t
PDH
of the 4 drivers within a package.
4. t
SK6
computed by subtracting the shortest t
PDL
from the longest t
PDL
of the 4 drivers within a package.
V
EE
t
PZH
t
PZL
t
PLZ
t
PHZ
1.5 V
Output
Current
(V
in
= Lo)
0.1 V
SS
/R
L
0.1 V
SS
/R
L
V
SS
/R
L
V
SS
/R
L
0.5 V
SS
/R
L
0.5 V
SS
/R
L
R
L
0 or 3.0 V
En
V
SS
500 pF
450
S.G.
V
CC
450
C
C
+3.0 V
1.5 V
0 V
V
in
V
CC
V
in
+2.5 V
S.G.
500 pF
V
O
(V
in
= Hi)
Vin
1.5 V
V
out
10%
50%
90%
t
r
1.5 V
90%
0 V
10%
V
in
50%
t
f
t
PDL
t
PDH

MC26LS30DR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
RS-422 Interface IC Dual Diff EIA-422-A to Quad EIA-423-A
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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