CAT874
http://onsemi.com
5
SYSTEM DESCRIPTION AND APPLICATIONS INFORMATION
General
CAT874 is designed for the manual switching of
microprocessors and microcontrollers. To prevent
accidental resets, CAT874 requires PWR_ON input be held
low for a prescribed period before an Active high output is
issued to the system processor.
PWR_ON and V
CHG
Inputs
PWR_ON and V
CHG
are Schmitt trigger CMOS inputs.
PWR_ON must go low and stay low for a predetermined
period (t
LOW_DELAY
) to generate an Active high on the
output.
V
CHG
is a standard CMOS input with internal pull down
resistor 200 kW to keep the input low when charger is not
plugged in and PWR_ON is also a CMOS input with an
internal 200 kW pull−up resistor, thus PWR_ON can be left
floating.
When PWR_ON goes low, an internal timing cycle is
initiated. If it goes high before the countdown timer has
concluded its cycle, the timer will reset and will restart from
the beginning when PWR_ON returns to being low.
Output (OUT)
CAT874 provides an active−high push pull output. This
output will sink up to 3 mA.
Delay Timer Testing:
A user test mode is provided to reduce the system test time
after the CAT874 is mounted on the board. Instead of
waiting t
LOW_DELAY
for the output to go active.
The user brings PWR_ON low, and sends seven positive
edges on the V
CHG
pin in a window of time t
ST
. After a delay
t
D
, the device output will change state from low to high, and
will return to the low state only when there is a high−to−low
transition on PWR_ON.
Figure 4. TOC Mode
PWR_ON
V_CHG
1234567 8
OUT
tP
tDtST
