QT1080-IS48G Datasheet QT1080-ISG, QT1080-IS48G | P7-P9

2 Device Operation

2.1 Start-up Time

After a reset or power-up event, the device requires 350ms

to initialize, calibrate, and start operating normally. Keys will

work properly once all keys have been calibrated after reset.

2.2 Option Resistors

The option resistors are read on power-up only. There are

two primary option mode configurations: full, and simplified.

In full options mode, eight 1M✡ option resistors are required

as shown in Figure 1.1. All eight resistors are mandatory.

To obtain simplified mode, a 1M✡ resistor should be

connected from SNS6K to SNS7. In simplified mode, only

one additional 1M✡ option resistor is required for the AKS

feature (Figure 1.2).

Note that the presence and connection of option resistors

will affect the required values of Cs; this effect will be

especially noticeable if the Cs values are under 22nF. Cs

values should be adjusted for optimal sensitivity after the

option resistors are connected.

2.3 OUT Pins - Direct Mode

Direct output mode is selected via option resistors, as shown

in Table 1.4.

In this mode, there is one output for each key; each is active

when a touch is confirmed on the corresponding electrode.

Unused OUT pins should be left open.

If AKS is off, it is possible for all OUT pins to be active at the

same time.

Circuit of Figure 1.1: OUT polarity and drive are governed

by the resistor connections to Vdd or Vss according to

Table 1.4. The drive can be either push-pull or open-drain,

active low or high.

Circuit of Figure 1.2: In this simplified circuit, the OUT pins

are active high, push-pull only.

2.4 OUT Pins - Binary Coded Mode

Binary code mode is selected via option resistors, as shown

in Table 1.4.

In this mode, a key detection is registered as a binary code

on pins OUT_2, OUT_1 and OUT_0, with possible values

from 000 to 111. In practice, four lines are required to read

the code, unless key 0 is not implemented; the output code

000 can mean either ‘nothing detecting’ or ‘key 0 is

detecting’. The fourth required line (if all eight keys are

implemented) is the DETECT signal, which is active-high

when any key is active.

The first key touched always wins and shows its output.

Keys that come afterwards are hidden until the currently

reported key has stopped detecting, in which case the code

will change to the latent key.

This mode is useful to reduce the number of connections to

a host controller, at the expense of being able to only report

one active key at a time. Note that in global AKS mode

(Section 2.7), only one key can report active at a time

anyway.

Circuit of Figure 1.1: OUT polarity and drive can only be

push-pull and active high.

Circuit of Figure 1.2: Binary coded not available.

2.5 DETECT Pin

DETECT represents the functional logical-OR of all eight

keys. DETECT can be used to wake up a battery-operated

product upon human touch.

DETECT is also required to indicate to a host when the

binary coded output pins (in that mode) are showing an

active key. While DETECT is active, the binary coded

outputs should be read at least twice along with DETECT to

make sure that the code was not transitioning between

states, to prevent a false reading.

The output polarity and drive of DETECT are governed

according to Table 1.4.

2.6 SYNC/LP Pin

The SYNC / LP pin function is configured according to the

SL_0 and SL_1 resistor connections to either Vdd or Vss,

according to Table 1.5.

Sync mode: Sync allows the designer to synchronize

acquire bursts to an external signal source, such as mains

frequency (50/60 Hz) to suppress interference. It can also be

used to synchronize two QT parts which operate near each

other, so that they will not cross-interfere if two or more of

the keys (or associated wiring) of the two parts are near

each other.

The SYNC input of the QT1080 is positive pulse triggered. If

the SYNC input does not change, the device will free-run at

its own rate after ~150ms.

A trigger pulse on SYNC will cause the device to fire two

acquire bursts in A-B sequence:

Burst A: Keys 0, 1, 4, 5

Burst B: Keys 2, 3, 6, 7

Low Power LP Mode: This allows the device to enter a Low

Power mode with very low power consumption, in one of

three response time settings: 110ms, 200ms, and 360ms

nominal.

LP mode is entered by a positive >150µs trigger pulse on the

SYNC/LP pin. Once the LP pulse is detected, the device will

enter and remain in this microamp mode until it senses and

confirms a touch. Then it will switch back to normal (full

speed) mode on its own, with a response time of 30ms

typical (burst length dependent). The device will go back to

LP mode again if SYNC/LP is held high, or after another LP

pulse is received.

The response time setting is determined by option resistors

SL_1 and SL_0; see Table 1.5. Slower response times result

in lower power drain.

The SYNC/LP pulse should be >150µs in duration.

If the SYNC/LP pin is held high permanently, the device will

go into normal mode during a key touch, and return to

low-current mode when the detection ceases.

If the SYNC/LP pin is held low constantly, the device will

remain in normal mode (25ms typical response time)

continuously.

7 QT1080 R11.06/0806

2.7 AKS Function Pins

The QT1080 features an adjacent key suppression (AKS)

function with two modes. Option resistors act to set this

feature according to Tables 1.2 and 1.6. AKS can also be

disabled, allowing any combination of keys to become active

at the same time. When operating, the modes are:

Global: AKS functions operates across all eight keys. This

means that only one key can be active at any one time.

Groups: AKS functions among two groups of four keys:

0-1-4-5 and 2-3-6-7. This means that up to two keys can

be active at any one time.

In Group mode, keys in one group have no AKS interaction

with keys in the other group.

Note that in Fast Detect mode, AKS can only be off.

2.8 MOD_0, MOD_1 Inputs

In full option mode, MOD_0 and MOD_1 resistors are used

to set the ‘Max On-Duration’ recalibration timeouts. If a key

becomes stuck on for a lengthy duration of time, this feature

will cause an automatic recalibration event of that specific

key only once the specified on-time has been exceeded.

Settings of 10s, 60s, and infinite are available.

The Max On-Duration feature operates on a key-by-key

basis; when one key is stuck on, its recalibration has no

effect on other keys.

The logic combination on the MOD option pins sets the

timeout delay (see Table 1.3).

Simplified mode MOD timing: In simplified mode, the max

on-duration is fixed at 60 seconds.

2.9 Fast Detect Mode

In many applications, it is desirable to sense touch at high

speed. Examples include scrolling ‘slider’ strips or ‘Off’

buttons. It is possible to place the device into a ‘Fast Detect’

mode that usually requires under 10ms to respond. This is

accomplished internally by setting the Detect Integrator to

only two counts, i.e. only two successive detections are

required to detect touch.

In LP mode, ‘Fast’ detection will not speed up the initial

delay (which could be up to 360ms nominal depending on

the option setting). However, once a key is detected the

device is forced back into normal speed mode . It will remain

in this faster mode until another LP pulse is received.

When used in a ‘slider’ application, it is normally desirable to

run the keys without AKS.

In both normal and ‘Fast’ modes, the time required to

process a key release is the same. It takes six sequential

confirmations of non-detection to turn a key off.

Fast Detect mode can be enabled as shown in Tables 1.2

and 1.6.

2.10 Simplified Mode

A simplified operating mode which does not require the

majority of option resistors is available. This mode is set by

connecting a resistor labelled SMR between pins SNS6K

and SNS7 (see Figure 1.2).

In this mode there is only one option possible - AKS enable

or disable. When AKS is disabled, Fast Detect mode is

enabled; when AKS is enabled, Fast Detect mode is off.

AKS in this mode is Global only (i.e. operates across all

functioning keys).

The other option features are fixed as follows:

OUT_n, DETECT Pins: Push-pull, active high, direct

outputs

SYNC/LP Function: LP mode, ~200ms response time

Max On-Duration: 60 seconds

See Tables 1.6 and 1.7.

2.11 Unused Keys

Unused keys should be disabled by removing the

corresponding Cs, Rs, and Rsns components and

connecting SNS pins as shown in the ‘Unused’ column of

Table 1.1. Unused keys are ignored and do not factor into

the AKS function (Section 2.7).

3 Design Notes

3.1 Oscillator Frequency

The QT1080’s internal oscillator runs from an external

resistor network connected to the OSC and SS pins as

shown in Figures 1.1 and 1.2 to achieve spread spectrum

operation. If spread spectrum mode is not required, the OSC

pin should be connected to Vdd with an 18KΩ 1% resistor.

Under different Vdd voltage conditions the resistor network

(or the solitary 18KΩ resistor) might require minor

adjustment to obtain the specified burst center frequency.

The network should be adjusted slightly so that the positive

pulses on any key are approximately 2µs wide in the ‘solitary

18KΩ resistor’ mode, or 2.15µs wide at the beginning of a

burst with the recommended spread-spectrum circuit (see

next section).

In practice, the pulse width has little effect on circuit

performance if it varies in the range from 1.5µs to 2.5µs. The

only effects will be seen in non-LP mode, as proportional

variations in Max On-Duration times and response times.

3.2 Spread-spectrum Circuit

The QT1080 offers the ability to spectrally spread its

frequency of operation to heavily reduce susceptibility to

external noise sources and to limit RF emissions. The SS pin

is used to modulate an external passive RC network that

modulates the OSC pin. OSC is the main oscillator current

input. The circuit is shown in both Figures 1.1 and 1.2.

The resistors Rb1 and Rb2 should be changed depending

on Vdd. As shown in Figures 1.1 and 1.2, two sets of values

are recommended for these resistors depending on Vdd.

The power curves in Section 4.6 also show the effect of

these resistors.

The circuit can be eliminated, if it is not desired, by using an

18KΩ resistor from OSC to Vdd to drive the oscillator, and

connecting SS to Vss with a 100KΩ resistor. This mode

consumes significantly less current than spread spectrum

mode.

The spread-spectrum RC network might need to be modified

slightly if the burst lengths are particularly long. Vdd

variations can shift the center frequency and spread slightly.

8 QT1080 R11.06/0806

The sawtooth waveform observed on SS should reach a

crest height as follows:

Vdd >= 3.6V:17% of Vdd

Vdd < 3.6V: 20% of Vdd

The 100nF capacitor connected to SS (Figures 1.1 and 1.2)

should be adjusted so that the waveform approximates the

above amplitude, ±10%, during normal operation in the

target circuit. If this is done, the circuit will give a spectral

modulation of 12-15%.

3.3 Cs Sample Capacitors - Sensitivity

The Cs sample capacitors accumulate the charge from the

key electrodes and determine sensitivity. Higher values of

Cs make the corresponding sensing channel more sensitive.

The values of Cs can differ for each channel, permitting

differences in sensitivity from key to key or to balance

unequal sensitivities. Unequal sensitivities can occur due to

key size and placement differences and stray wiring

capacitances. More stray capacitance on a sense trace will

desensitize the corresponding key; increasing the Cs for that

key will compensate for the loss of sensitivity.

The Cs capacitors can be virtually any plastic film or low to

medium-K ceramic capacitor. The normal Cs range is 2 .2nF

to 50nF depending on the sensitivity required; larger values

of Cs require better quality to ensure reliable sensing. In

certain circumstances the normal Cs range may be

exceeded, hence the different values in Section 4.2.

Acceptable capacitor types for most uses include PPS film,

polypropylene film, and NP0 and X7R ceramics. Lower

grades than X7R are not advised.

The required values of Cs can be noticeably affected by the

presence and connection of the option resistors (see

Section 2.2).

3.4 Power Supply

The power supply can range from 2.8 to 5.0 volts. If this

fluctuates slowly with temperature, the device will track and

compensate for these changes automatically with only minor

changes in sensitivity. If the supply voltage drifts or shifts

quickly, the drift compensation mechanism will not be able to

keep up, causing sensitivity anomalies or false detections.

The power supply should be locally regulated, using a

three-terminal device, to between 2.8V and 5.0V. If the

supply is shared with another electronic system, care should

be taken to ensure that the supply is free of digital spikes,

sags and surges which can cause adverse effects.

For proper operation a 0.1µF or greater bypass capacitor

must be used between Vdd and Vss; the bypass capacitor

should be routed with very short tracks to the device’s Vss

and Vdd pins.

3.5 PCB Layout and Construction

Refer to Quantum application note AN-KD02 for information

related to layout and construction matters.

9 QT1080 R11.06/0806

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