TC7W240FU
2014-11-18
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC7W240FU
Inverted, 3-State Outputs
The TC7W240FU is a high speed C
2
MOS Dual Bus Buffers
fabricated with silicon gate C
2
MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the C
2
MOS low power dissipation.
It is an inverting 3-state buffer having two active-low output
enables.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
• High speed: t
pd
= 10 ns (typ.) at V
CC
= 5 V
• Low power dissipation: I
CC
= 2 µA (max) at Ta = 25°C
• High noise immunity: V
NIH
= V
NIL
= 28% V
CC
(min)
• Output drive capability: 15 LSTTL loads
• Symmetrical output impedance: |I
OH
| = I
OL
= 6 mA (min)
• Balanced propagation delays: t
pLH
t
pHL
• Wide operating voltage range: V
CC
(opr) = 2 to 6 V
Absolute Maximum Ratings (Ta
25°C)
Characteristics Symbol Rating Unit
Supply voltage range V
CC
−0.5 to 7 V
DC input voltage V
IN
−0.5 to V
CC
+ 0.5 V
DC output voltage V
OUT
−0.5 to V
CC
+ 0.5 V
Input diode current I
IK
±20 mA
Output diode current I
OK
±20 mA
DC output current I
OUT
±35 mA
DC V
CC
/ground current I
CC
±37.5 mA
Power dissipation P
D
300 mW
Storage temperature range T
stg
−65 to 150 °C
Lead temperature (10 s) T
L
260 °C
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if
the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Start of commercial production
1993-
