Rev. A | Page 9 of 13
12474-007
AN ACTIVE LOW CHIP SELECT. ENSURE ALSO THAT THE SPI CLK LINE IS NOT HELD
WHEN USING SPI INTERFACE, BE AWARE OF ADDING A PULL UP
HIGH OR LOW BY YOUR BOARD AT POWER UP. FAILURE TO MEET THIS
ON THE SPI_SEL_A/B/C LINES THAT ARE ACTIVE LOW ENABLED
THE SDP CONNECTOR IMPLEMENTS THE E13 CONNECTOR SPECIFICATIONS STANDARD. THIS IS A STANDARD FOR USE ACROSS ADI AND CANNOT BE MODIFIED
REQUIRED (CONNECTED TO BLACKFIN
CONNECTORS ON SDP - PULL UP RESISTORS
TO BOOT FROM A SPI FLASH ON THE DAUGHTER BOARD
BMODE1: PULL UP WITH A 10K RESISTOR TO SET SDP
12C BUS 1 IS COMMON ACROSS BOTH
GPIO - USE 12C_0 FIRST)
VIN: USE THIS PIN TO POWER
THE SDP REQUIRES 5V 300MA
WITH EXTERNAL SPI FLASH
SPI_SEL1/SPI_SS MUST BE ONLY USED
RESULT TO A NON-FUNCTIONAL SYSTEM.
VIO: USE TO SET IO VOLTAGE MAX DRAW 20MA
: USE ONLY TO POWER THE EEPROM(3MA MAX DRAW)
MAIN 12C BUS (CONNECTED TO BLACKFIN TWI - PULL UP RESISTORS NOT REQUIRED
BOARD ID EEPROM (24LC32) MUST BE ON I2C BUS 0
SINCE SPI IS A SHARED BUS, ENSURE THAT ANY SPI DEVICE ON DAUGHTER BOARD
IS NOT ACTIVELY DRIVING THE MISO DATA LINE UNLESS PROPERLY ADDRESSED WITH
R13
R20
21
E1
C23C22
C21
R12
N P
C24
C25
R1
R3
R2
7
4
8
5
6
3
2
1
U1
65
116
1
5
6259
7249
7348
87
89
30
29 92
90
32
88
31
91
38
37
85
39
84
83
34
33
82
64
35
41 80
42 79
57
60
10021
99
26 95
27
7 114
8 113
9 112
10 111
110
12
13 108
14 107
15 106
16 105
18 103
19 102
20 101
22
94
24 97
25 96
120
119
70
68
67
6655
54
53
51
50
2
7447
7645
7744
7843
118
117
115
109
104
98
93
86
81
75
69
6358
52
46
40
36
28
23
17
11
6
4
3
56
71
61
SDP
1.8
VIO
DNI
R0603
TOL=1
100K
R0603
TOL=1
100K
R0603
TOL=1
100K
DNI
R0603
100K
4.7UF
0.1UF
0.1UF
USB_SUPPLY
SYNCB
SDIN
FX8-120S-SV(21)
24LC32A-I/ST
TSSOP8
EEPROM
10UF
600OHM
SDP CONNECTOR
VIO
GAIN
RESETB
A0 A1
LDACB
RSTSEL
SCLK
SCL_0
SDO
SDA_0
10UF
0
VIO
DGND
DGND
DGND
DGND
AGND AGND
VSS
VCC
WP
A2
A1
A0
SCL
SDA
DGND
DGND
DGND
SPI_SEL_A
CLKOUT
NC
NC
GND
GND
VIO(+3.3V)
GND
PAR_D22
PAR_D20
PAR_D18
PAR_D16
PAR_D15
GND
PAR_D12
PAR_D10
PAR_D8
PAR_D6
GND
PAR_D4
PAR_D2
PAR_D0
PAR_WR_N
PAR_INT
GND
PAR_A2
PAR_A0
PAR_FS2
PAR_CLK
GND
SPORT_RSCLK
SPORT_DR0
SPORT_RFS
SPORT_TFS
SPORT_DT0
SPORT_TSCLK
GND
SPI_MOSI
SPI_MISO
SPI_CLK
GND
SDA_0
SCL_0
GPIO1
GPIO3
GPIO5
GND
GPIO7
TMR_B
TMR_D
NC
GND
NC
NC
NC
WAKE_N
SLEEP_N
GND
UART_TX
BMODE1RESET_IN_N
UART_RX
GND
RESET_OUT_N
EEPROM_A0
NC
NC
NC
GND
NC
NC
TMR_C
TMR_A
GPIO6
GND
GPIO4
GPIO2
GPIO0
SCL_1
SDA_1
GND
SPI_SEL1/SPI_SS_N
SPI_SEL_C_N
SPI_SEL_B_N
GND
SERIAL_INT
SPI_D3
SPI_D2
SPORT_DT1
SPORT_DR1
SPORT_TDV1
SPORT_TDV0
GND
PAR_FS1
PAR_FS3
PAR_A1
PAR_A3
GND
PAR_CS_N
PAR_RD_N
PAR_D1
PAR_D3
PAR_D5
GND
PAR_D7
PAR_D9
PAR_D11
PAR_D13
PAR_D14
GND
PAR_D17
PAR_D19
PAR_D21
PAR_D23
GND
USB_VBUS
GND
GND
NC
VIN
IF VCC WILL BE USED TO POWER THE MODULE, PROVIDE PROTECTION CIRCUIT BLOCK IF POSSIBLE
CONNECT VCC TO 3.3V DIGITAL REFERENCE OR LEAVE FLOATING
CONNECT P1-P4 AND P7-P10 TO SIGNAL BUSES FOR SPI
PMOD INTERFACE TYPE 2A (EXPANDED SPI)
126
10
9
8
7
4
3
2
1
115
PMOD
SDO_SDA
SYNCB_SCL
GAIN
RSTSEL
SDIN_A1
SCLK_A0
TSW-106-08-G-D
DNI
LDACB
RESETB
VDD VIO
DGND
VCC
GND
P10
P9
P8
P7
VCC
GND
P4
P3
P2
P1
DGND
