13
PWM Output Capacitors
Modern microprocessors produce transient load rates above
1A/ns. High frequency capacitors initially supply the transient
current and slow the load rate-of-change seen by the bulk
capacitors. The bulk filter capacitor values are generally
determined by the ESR (effective series resistance) and
voltage rating requirements rather than actual capacitance
requirements.
High frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements.
Use only specialized low-ESR capacitors intended for
switching-regulator applications for the bulk capacitors. The
bulk capacitor’s ESR determines the output ripple voltage
and the initial voltage drop following a high slew-rate
transient’s edge. An aluminum electrolytic capacitors ESR
value is related to the case size with lower ESR available in
larger case sizes. However, the equivalent series inductance
(ESL) of these capacitors increases with case size and can
reduce the usefulness of the capacitor to high slew-rate
transient loading. Unfortunately, ESL is not a specified
parameter. Work with your capacitor supplier and measure
the capacitor’s impedance with frequency to select a suitable
component. In most cases, multiple electrolytic capacitors of
small case size perform better than a single large case
capacitor.
Linear Output Capacitors
The output capacitors for the linear regulators provide
dynamic load current. The linear controllers use dominant
pole compensation integrated into the error amplifier and are
insensitive to output capacitor selection. Output capacitors
should be selected for transient load regulation.
PWM Output Inductor Selection
The PWM converter requires an output inductor. The output
inductor is selected to meet the output voltage ripple
requirements and sets the converters response time to a
load transient. The inductor value determines the converter’s
ripple current and the ripple voltage is a function of the ripple
current. The ripple voltage and current are approximated by
the following equations:
Increasing the value of inductance reduces the ripple current
and voltage. However, the large inductance values increase
the converter’s response time to a load transient.
One of the parameters limiting the converter’s response to a
load transient is the time required to change the inductor
current. Given a sufficiently fast control loop design, the
HIP6021 will provide either 0% or 100% duty cycle in
response to a load transient. The response time is the time
interval required to slew the inductor current from an initial
current value to the post-transient current level. During this
interval the difference between the inductor current and the
transient current level must be supplied by the output
capacitor(s). Minimizing the response time can minimize the
output capacitance required.
The response time to a transient is different for the
application of load and the removal of load. The following
equations give the approximate response time interval for
application and removal of a transient load:
where: I
TRAN
is the transient load current step, t
RISE
is the
response time to the application of load, and t
FALL
is the
response time to the removal of load. Be sure to check both
of these equations at the minimum and maximum output
levels for the worst case response time.
Input Capacitor Selection
The important parameters for the bulk input capacitors are
the voltage rating and the RMS current rating. For reliable
operation, select bulk input capacitors with voltage and
current ratings above the maximum input voltage and largest
RMS current required by the circuit. The capacitor voltage
rating should be at least 1.25 times greater than the
maximum input voltage and a voltage rating of 1.5 times is a
conservative guideline. The RMS current rating requirement
for the input capacitor of a buck regulator is approximately
1/2 of the summation of the DC load current.
Use a mix of input bypass capacitors to control the voltage
overshoot across the MOSFETs. Use ceramic capacitance
for the high frequency decoupling and bulk capacitors to
supply the RMS current. Small ceramic capacitors can be
placed very close to the upper MOSFET to suppress the
voltage induced in the parasitic circuit impedances.
For a through-hole design, several electrolytic capacitors
(Panasonic HFQ series or Nichicon PL series or Sanyo
MV-GX or equivalent) may be needed. For surface mount
designs, solid tantalum capacitors can be used, but caution
must be exercised with regard to the capacitor surge current
rating. These capacitors must be capable of handling the
surge-current at power-up. The TPS series available from
AVX, and the 593D series from Sprague are both surge
current tested.
MOSFET Selection/Considerations
The HIP6021 requires 5 external transistors. Two N-channel
MOSFETs are used in the synchronous-rectified buck
topology of PWM1 converter. It is recommended that the
AGP linear regulator pass element be a N-channel MOSFET
as well. The GTL and memory linear controllers can also
I
V
IN
V
OUT
F
S
L
--------------------------------
V
OUT
V
IN
----------------=
V
OUT
I ESR=
t
RISE
L
O
I
TRAN
V
IN
V
OUT
--------------------------------=
t
FALL
L
O
I
TRAN
V
OUT
-------------------------------=
HIP6021
14
each drive a MOSFET or a NPN bipolar as a pass transistor.
All these transistors should be selected based upon
r
DS(ON)
, current gain, saturation voltages, gate supply
requirements, and thermal management considerations.
PWM MOSFET Selection and Considerations
In high-current PWM applications, the MOSFET power
dissipation, package selection and heatsink are the
dominant design factors. The power dissipation includes two
loss components; conduction loss and switching loss. These
losses are distributed between the upper and lower
MOSFETs according to duty factor (see the equations
below). The conduction losses are the main component of
power dissipation for the lower MOSFETs. Only the upper
MOSFET has significant switching losses, since the lower
device turns on and off into near zero voltage.
The equations below assume linear voltage-current
transitions and do not model power loss due to the reverse-
recovery of the lower MOSFET’s body diode. The gate-
charge losses are dissipated by the HIP6021 and don't heat
the MOSFETs. However, large gate-charge increases the
switching time, t
SW
which increases the upper MOSFET
switching losses. Ensure that both MOSFETs are within their
maximum junction temperature at high ambient temperature
by calculating the temperature rise according to package
thermal-resistance specifications. A separate heatsink may
be necessary depending upon MOSFET power, package
type, ambient temperature and air flow.
The r
DS(ON)
is different for the two equations above even if
the same device is used for both. This is because the gate
drive applied to the upper MOSFET is different than the
lower MOSFET. Figure 11 shows the gate drive where the
upper MOSFET’s gate-to-source voltage is approximately
VCC less the input supply. For +5V main power and
+12VDC for the bias, the gate-to-source voltage of Q1 is 7V.
The lower gate drive voltage is +12VDC. A logic-level
MOSFET is a good choice for Q1 and a logic-level MOSFET
can be used for Q2 if its absolute gate-to-source voltage
rating exceeds the maximum voltage applied to VCC.
Rectifier CR1 is a clamp that catches the negative inductor
swing during the dead time between the turn off of the lower
MOSFET and the turn on of the upper MOSFET. The diode
must be a Schottky type to prevent the lossy parasitic
MOSFET body diode from conducting. It is acceptable to
omit the diode and let the body diode of the lower MOSFET
clamp the negative inductor swing, but efficiency could drop
one or two percent as a result. The diode's rated reverse
breakdown voltage must be greater than the maximum input
voltage.
Linear Controller Transistor Selection
The main criteria for selection of transistors for the linear
regulators is package selection for efficient removal of heat.
The power dissipated in a linear regulator is:
Select a package and heatsink that maintains the junction
temperature below the rating with a the maximum expected
ambient temperature.
When selecting bipolar NPN transistors for use with the
linear controllers, insure the current gain at the given
operating VCE is sufficiently large to provide the desired
output load current when the base is fed with the minimum
driver output current.
P
UPPER
I
O
2
r
DS ON
V
OUT
V
IN
------------------------------------------------------------
I
O
V
IN
t
SW
F
S
2
----------------------------------------------------+=
P
LOWER
I
O
2
r
DS ON
V
IN
V
OUT

V
IN
---------------------------------------------------------------------------------=
FIGURE 11. UPPER GATE DRIVE - DIRECT V
CC
DRIVE OPTION
+12V
PGND
HIP6021
GND
LGATE
UGATE
PHASE
VCC
+5V OR LESS
NOTE:
NOTE:
V
GS
V
CC
Q1
Q2
+
-
V
GS
V
CC
-5V
CR1
P
LINEAR
I
O
V
IN
V
OUT
=
HIP6021
15
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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HIP6021 DC-DC Converter Application Circuit
Figure 12 shows an application circuit of a power supply for a
microprocessor computer system. The power supply provides
the microprocessor core voltage (VOUT1), the AGP bus
voltage (VOUT2), the GTL bus voltage (VOUT3), and the
memory voltage (VOUT4) from +3.3V, +5VDC, and +12VDC.
For detailed information on the circuit, including a Bill-of-
Materials and circuit board description, see Application Note
AN9836. Also see Intersil’s web page
(http://www.intersil.com).
VID1
VID2
VID3
VID4
SS
GND
VCC
+5V
IN
VID0
+12V
IN
PGND
VSEN1
PGOOD
LGATE
UGATE
OCSET
PHASE
Q1,2
POWERGOOD
FB
COMP
V
OUT2
VSEN2
DRIVE2
Q3
DRIVE3
VSEN3
DRIVE4
C25,26
V
OUT3
V
OUT4
C23,24
C12-19
HIP6021
Q4
L2
+
+
+
+
+
C7
L1
C1-6
C9
C8
R1
V
OUT1
R2
R3
C20
C21
C22
C27
2x1000F
2x1000F
C10,11
2x1000F
1H
6x1000F
1F
1F
1000pF
8x1000F
0.1F
4.2H
0.22F
10pF
2.7nF
10.2K
1.62k
GND
(3.3V or 1.5V)
(1.5V)
(1.8V)
VSEN4
TYPEDET
SELECT
+3.3V
IN
R5
499K
R4
150K
SD
FIX
1.0K
Q5
U1
1
2
3
4
5
6
7
8
9
10
11
12
13
16
15
14
17
18
19
20
21
22
23
24
25
26
27
28
FAULT/RT
VAUX
HUF76107D3S
HUF76107D3S
HUF76121D3S
2xHUF76143S3S
(1.3V-3.5V)
FIGURE 12. POWER SUPPLY APPLICATION CIRCUIT FOR A MICROPROCESSOR COMPUTER SYSTEM
HIP6021

HIP6021CBZ-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Switching Controllers SINGLE PWM & TRPL LINEAR CNTRLR
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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