MAX1772
Low-Cost, Multichemistry Battery-
Charger Building Block
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The input source current is the sum of the device cur-
rent, the charger input current, and the load current.
The device current is minimal (6mA) in comparison to
the charge and load currents. The actual source cur-
rent required is determined as follows:
where η is the efficiency of the DC-DC converter (85%
to 95% typ).
V
CLS
determines the reference voltage of the GMS
error amplifier. Sense resistor RS1 sets the maximum
allowable source current. Calculate the maximum cur-
rent as follows:
Once the input current limit is reached, the charging
current is tapered back until the input current is below
the desired threshold.
When choosing the current-sense resistor, note that the
voltage drop across this resistor causes further power
loss, reducing efficiency.
AC Adapter Detection
Connect the AC adapter voltage through a resistive
divider to ACIN to detect when AC power is available,
as shown in Figure 1. ACOK is an open-drain output
and is high when ACIN is less than REF/2.
Current Measurement
Use ICHG to monitor the battery-charging current
being sensed across CSIP and CSIN. The output volt-
age range is 0 to 3V. The voltage of ICHG is proportion-
al to the output current by the equation:
where I
ICHG
is the battery-charging current, G
ICHG
is
the transconductance of ICHG (1mS typ), and R9 is the
resistor connected between ICHG and ground.
Connect ICHG pin to ground if it is not used.
Use IINP to monitor the system input current being
sensed across CSSP and CSSN. The output voltage
range is 0 to 3V. The voltage of IINP is proportional to
the output current by the equation:
where I
SOURCE
is the DC current being supplied by the
AC adapter power, G
IINP
is the transconductance of
IINP (1µS typ), and R10 is the resistor connected
between IINP and ground.
In the typical application circuit, duty cycle affects the
accuracy of V
IINP
(Figure 3). AC load current also
affects accuracy (Figure 4).
Connect IINP pin to ground if it is not used.
LDO Regulator
LDO provides a 5.4V supply derived from DCIN and
can deliver up to 15mA of current. The MOSFET drivers
are powered by DLOV and BST, which must be con-
nected to LDO as shown in Figure 1. LDO also supplies
the 4.096V reference (REF) and most of the control cir-
cuitry. Bypass LDO with a 1µF capacitor.
DC-to-DC Converter
The MAX1772 employs a buck regulator with a boot-
strapped NMOS high-side switch and a low-side NMOS
synchronous rectifier.
DC-DC Controller
The control scheme is a constant off-time variable fre-
quency, cycle-by-cycle current mode. The off-time is
constant for a given BATT voltage. It varies with V
BATT
operation; a maximum on-time of 10ms allows the con-
troller to achieve >99% duty cycle with continuous con-
duction. Figure 5 shows the controller functional
diagram.
MOSFET Drivers
The low-side driver output DLO swings from 0 to DLOV.
DLOV is usually connected through a filter to LDO. The
high-side driver output DHI is bootstrapped off LX and
swings from V
LX
to V
BST
. When the low-side driver
turns on, BST rises to one diode voltage below DLOV.
Filter DLOV with a resistor-capacitor (RC) circuit whose
cutoff frequency is about 50kHz. The configuration in
Figure 1 introduces a cutoff frequency of around
48kHz:
f = 1/2πRC = 1 / (2π
33Ω
0.1µF) = 48kHz (7)
