MAX1772
Low-Cost, Multichemistry Battery-
Charger Building Block
18 ______________________________________________________________________________________
The controller determines the constant off-time period,
which is dependent on BATT voltage. This makes the
ripple current independent of input and battery voltage,
and it should be kept to less than 1A. Calculate ΔI
L
with
the following equation:
(9)
Higher inductor values decrease the ripple current.
Smaller inductor values require high saturation current
capabilities and degrade efficiency. Typically, a 22µH
inductor is ideal for all operating conditions.
Current-Sense Input Filtering
In normal circuit operation with typical components, the
current-sense signals can have high-frequency tran-
sients that exceed 0.5V due to large current changes
and parasitic component inductance. To achieve prop-
er battery and input current compliance, the current-
sense input signals should be filtered to remove large
common-mode transients. The input current-limit sens-
ing circuitry is the most sensitive case due to large cur-
rent steps in the input filter capacitors (C6, C7) in
Figure 1. Use 0.47µF ceramic capacitors from CSSP
and CSSN to ground. Smaller 0.1µF ceramic capacitors
(C18, C19) can be used on the CSIP and CSIN inputs
to ground since the current into the battery is continu-
ous. Place these capacitors next to the single-point
ground directly under the MAX1772.
Layout and Bypassing
Bypass DCIN with a 1µF to ground (Figure 1). D4 pro-
tects the MAX1772 when the DC power source input is
reversed. A signal diode for D4 is adequate because
DCIN only powers the LDO and the internal reference.
Bypass LDO, BST, DLOV, and other pins as shown in
Figure 1.
Good PCB layout is required to achieve specified noise,
efficiency, and stable performance. The PC board layout
artist must be given explicit instructions—preferably, a
pencil sketch showing the placement of the power
switching components and high current routing. Refer to
the PCB layout in the MAX1772 evaluation kit for exam-
ples. A ground plane is essential for optimum perfor-
mance. In most applications, the circuit will be located
on a multilayer board, and full use of the four or more
copper layers is recommended. Use the top layer for
high current connections, the bottom layer for quiet con-
nections (REF, CCV, CCI, CCS, DCIN, and GND), and
the inner layers for an uninterrupted ground plane.
Use the following step-by-step guide:
1) Place the high power connections first, with their
grounds adjacent:
• Minimize the current-sense resistor trace
lengths, and ensure accurate current sensing
with Kelvin connections.
• Minimize ground trace lengths in the high
current paths.
• Minimize other trace lengths in the high current
paths.
• Use >5mm wide traces.
• Connect C1 and C2 to high-side MOSFET
(10mm max length).
• LX node (MOSFETs, rectifier cathode, inductor
(15mm max length)).
Ideally, surface-mount power components are flush
against one another with their ground terminals
almost touching. These high-current grounds are
then connected to each other with a wide, filled zone
of top-layer copper, so they do not go through vias.
The resulting top-layer subground plane is connect-
ed to the normal inner-layer ground plane at the
output ground terminals, which ensures that the
IC’s analog ground is sensing at the supply’s output
terminals without interference from IR drops and
ground noise. Other high current paths should also
be minimized, but focusing primarily on short
ground and current-sense connections eliminates
about 90% of all PCB layout problems.
2) Place the IC and signal components. Keep the
main switching node (LX node) away from sensitive
analog components (current-sense traces and REF
capacitor). Important: the IC must be no further
than 10mm from the current-sense resistors.
Keep the gate drive traces (DHI, DLO, and BST)
shorter than 20mm, and route them away from the
current-sense lines and REF. Place ceramic bypass
capacitors close to the IC. The bulk capacitors can
be placed further away. Place the current-sense
input filter capacitors under the part, connected
directly to the GND pin.
3) Use a single-point star ground placed directly
below the part. Connect the input ground trace,
power ground (subground plane), and normal
ground to this node.
