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74AUP1G32FW4-7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
74AUP1G32
Document number: DS35154 Rev. 4 - 2
1 of 16
www.diodes.com
February 2015
© Diodes Incorporated
74AUP1G32
SINGLE 2 INPUT POSITIVE OR GATE
Description
The Advanced Ultra Low Power (AUP) CMOS logic family is designed
for low power and extended battery life in portable applications.
The 74AUP1G32 is a single, two-input, positive OR gate with a
standard push-
pull output designed for operation over a power supply
range of 0.8V to 3.6
V. The device is fully specified for partial power
down applications using I
OFF
. The I
OFF
circuitry disables the output,
preventing damaging current backflow when the device is powered
down.
The gate performs the positive Boolean function:
B
A
+
=
or
B
A
Y
•
=
Features
• Advanced Ultra Low Power (AUP) CMOS
• Supply Voltage Range from 0.8V to 3.6V
• ±4mA Output Drive at 3.0V
• Low Static Power Consumption
Icc < 0.9µA
• Low Dynamic Power Consumption
C
PD
= 6.3pF (Typical at 3.6V)
• Schmitt Trigger Action at all inputs makes the circuit tolerant for
slower input rise and fall time. The hysteresis is typically 250mV
at V
CC
= 3.0V.
• I
OFF
Supports Partial-Power-Down Mode Operation
• ESD Protection Exceeds JESD 22
2000-V Human Body Model (A114)
Exceeds 1000-V Charged Device Model (C101)
• Latch-Up Exceeds 100mA per JESD 78, Class I
• Leadless Packages Named per JESD30E
• Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
• Halogen and Antimony Free. “Green” Device (Note 3)
Pin Assignments
Applications
• Suited for Battery and Low Power Needs
• Wide Array of Products Such As:
Tablets, E-readers
Cell Phones, Personal Navigation / GPS
MP3 Players, Cameras, Video Recorders
PCs, Ultrabooks, Notebooks, Netbooks
Computer Peripherals, Hard Drives, SSDs, CD/DVD ROMs
TVs, DVDs, DVRs, Set-Top Boxes
Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
4 Y
5 NC
6 Vcc
74AUP1G32
Document number: DS35154 Rev. 4 - 2
2 of 16
www.diodes.com
February 2015
© Diodes Incorporated
74AUP1G32
Ordering Information
74
AUP
1G
32
XXX
-
7
Logic Device
Function
Package
Packing
74 : Logic Prefix
32
:
2
-
Input
SE : SOT353
-
7 : 7” Tape & Reel
AUP
:
0.8
to
3.6
V
OR
Gate
FS3 : X2
-
DFN0808
-
4
Logic Family
FW5 : X1
-
DFN1010
-
6
1G : One Gate
FW4 :
X2
-
DFN1010
-
6
FX4 : X2
-
DFN1409
-
6
FZ4 : X2
-
DFN1410
-
6
Device
Package
Code
Package
(Notes 4 & 5)
Package
Size
7” Tape and Reel
Quantity
Part Number Suffix
74AUP1G32SE-7 SE SOT353
2.0mm x 2.0mm x 1.1mm
0.65 mm lead pitch
3,000/Tape & Reel -7
74AUP1G32FS3-7 FS3 X2-DFN0808-4
0.8mm x 0.8mm x 0.35mm
0.5 mm pad pitch (diamond)
5,000/Tape & Reel -7
74AUP1G32FW5-7 FW5 X1-DFN1010-6
1.0mm x 1.0mm x 0.5mm
0.35 mm pad pitch
5,000/Tape & Reel -7
74AUP1G32FW4-7 FW4 X2-DFN1010-6
1.0mm x 1.0mm x 0.4mm
0.35 mm pad pitch
5,000/Tape & Reel -7
74AUP1G32FX4-7 FX4
X2-DFN1409-6
Chip Scale Alternative
1.4mm x 0.9mm x 0.4mm
0.5 mm pad pitch
5,000/Tape & Reel -7
74AUP1G32FZ4-7 FZ4 X2-DFN1410-6
1.4mm x 1.0mm x 0.4mm
0.5 mm pad pitch
5,000/Tape & Reel -7
Notes: 4. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at
http://www.diodes.com/datasheets/ap02001.pdf.
5. The taping orientation is located on our website at http://www.diodes.com/datasheets/ap02007.pdf.
Pin Descriptions
Pin Name Function
A Data Input
B Data Input
GND Ground
Y Data Output
V
CC
Supply Voltage
Logic Diagram
Function Table
Inputs Output
A B Y
L L L
L H H
H L H
H H H
1
2
4
Y
74AUP1G32
Document number: DS35154 Rev. 4 - 2
3 of 16
www.diodes.com
February 2015
© Diodes Incorporated
74AUP1G32
Absolute Maximum Ratings
(Notes 6 & 7) (@T
A
= +25°C, unless otherwise specified.)
Symbol Description Rating Unit
ESD HBM Human Body Model ESD Protection 2 kV
ESD CDM Charged Device Model ESD Protection 1 kV
V
CC
Supply Voltage Range -0.5 to +4.6 V
V
I
Input Voltage Range -0.5 to +4.6 V
V
O
Voltage Applied to Output in High or Low State
-0.5 to V
CC
+0.5
V
I
IK
Input Clamp Current (V
I
< 0)
50 mA
I
OK
Output Clamp Current (V
O
< 0)
50 mA
I
O
Continuous Output Current (V
O
= 0 to V
CC
)
±20 mA
I
CC
Continuous Current Through V
CC
50 mA
I
GND
Continuous Current Through GND -50 mA
T
J
Operating Junction Temperature -40 to +150 °C
T
STG
Storage Temperature -65 to +150 °C
Notes: 6. Stresses beyond the absolute maximum may result in immediate failure or reduced reliability. These are stress values and device operation should be
within recommend values.
7. Forcing the maximum allowed voltage could cause a condition exceeding the maximum current or conversely forcing the maximum current could cause a
condition exceeding the maximum voltage. The ratings of both current and voltage must be maintained within the controlled range.
Recommended Operating Conditions
(Note 8) (@T
A
= +25°C, unless otherwise specified.)
Symbol Parameter Min Max Unit
V
CC
Operating Voltage 0.8 3.6 V
V
I
Input Voltage 0 3.6 V
V
O
Output Voltage 0
V
CC
V
I
OH
High-Level Output Current
V
CC
= 0.8V
—
-20 µA
V
CC
= 1.1V
—
-1.1
mA
V
CC
= 1.4V
—
-1.7
V
CC
= 1.65V
—
-1.9
V
CC
= 2.3V
—
-3.1
V
CC
= 3.0V
—
-4
I
OL
Low-Level Output Current
V
CC
= 0.8V
—
20 µA
V
CC
= 1.1V
—
1.1
mA
V
CC
= 1.4V
—
1.7
V
CC
= 1.65V
—
1.9
V
CC
= 2.3V
—
3.1
V
CC
= 3.0V
—
4
∆t/∆V Input Transition Rise or Fall Rate
V
CC
= 0.8V to 3.6V
—
200 ns/V
T
A
Operating Free-Air Temperature -40 +125 °C
Note: 8. Unused inputs should be held at V
CC
or Ground.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

74AUP1G32FW4-7

Mfr. #:
Buy 74AUP1G32FW4-7
Manufacturer:
Diodes Incorporated
Description:
Logic Gates Single 2Input POS OR 6.3pF 0.8 to 2.6 AUP
Lifecycle:
New from this manufacturer.
Delivery:
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