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Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
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1. General description
The 74AUP1G07 provides the single non-inverting buffer with open-drain output. The
output of the device is an open drain and can be connected to other open-drain outputs to
implement active-LOW wired-OR or active-HIGH wired-AND functions.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9 A (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from 40 Cto+85C and 40 Cto+125C
74AUP1G07
Low-power buffer with open-drain output
Rev. 7 — 16 July 2012 Product data sheet
74AUP1G07 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 7 — 16 July 2012 2 of 19
NXP Semiconductors
74AUP1G07
Low-power buffer with open-drain output
3. Ordering information
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74AUP1G07GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
SOT353-1
74AUP1G07GM 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads;
6 terminals; body 1 1.45 0.5 mm
SOT886
74AUP1G07GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads;
6 terminals; body 1 1 0.5 mm
SOT891
74AUP1G07GN 40 C to +125 C XSON6 extremely thin small outline package; no leads;
6 terminals; body 0.9 1.0 0.35 mm
SOT1115
74AUP1G07GS 40 C to +125 C XSON6 extremely thin small outline package; no leads;
6 terminals; body 1.0 1.0 0.35 mm
SOT1202
74AUP1G07GX 40 C to +125 C X2SON5 X2SON5: plastic thermal enhanced extremely thin
small outline package; no leads; 5 terminals;
body 0.8 0.8 0.35 mm
SOT1226
Table 2. Marking
Type number Marking code
[1]
74AUP1G07GW pS
74AUP1G07GM pS
74AUP1G07GF pS
74AUP1G07GN pS
74AUP1G07GS pS
74AUP1G07GX pS
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram
mna623
AY
2
4
mna624
4
2
A
Y
mna625
A
Y
GND

74AUP1G07GX4Z

Mfr. #:
Manufacturer:
Nexperia
Description:
Low-Power Buffer 1-CH Non-Inverting Open Drain CMOS 4-Pin X2SON T/R - Tape and Reel (Alt: 74AUP1G07GX4Z)
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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