Chopper-Stabilized, Two Wire
Hall-Effect Latch
A1245
9
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Figure 2: Typical Application Circuits
GND
A1245
VCC
V+
0.01 µF
(A) Low Side Sensing (B) High Side Sensing
LH and UA Packages
R
SENSE
C
BYP
GND
A1245
VCC
V+
0.01 µF
R
SENSE
C
BYP
Amp
Regulator
Clock/Logic
Hall Element
Sample and
Hold
Low-Pass
Filter
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for
switchpoint accuracy is the small signal voltage developed
across the Hall element. This voltage is disproportionally small
relative to the offset that can be produced at the output of the
Hall sensor IC. This makes it difficult to process the signal while
maintaining an accurate, reliable output over the specified oper-
ating temperature and voltage ranges. Chopper stabilization is
a unique approach used to minimize Hall offset on the chip. The
Allegro technique, namely Dynamic Quadrature Offset Cancella-
tion, removes key sources of the output drift induced by thermal
and mechanical stresses. This offset reduction technique is based
on a signal modulation-demodulation process. The undesired
offset signal is separated from the magnetic field-induced signal
in the frequency domain, through modulation. The subsequent
demodulation acts as a modulation process for the offset, causing
the magnetic field-induced signal to recover its original spectrum
at base band, while the DC offset becomes a high-frequency
signal. The magnetic-sourced signal then can pass through a
low-pass filter, while the modulated DC offset is suppressed. The
chopper stabilization technique uses a 350 kHz high frequency
clock. For demodulation process, a sample and hold technique is
used, where the sampling is performed at twice the chopper fre-
quency. This high-frequency operation allows a greater sampling
rate, which results in higher accuracy and faster signal-process-
ing capability. This approach desensitizes the chip to the effects
of thermal and mechanical stresses, and produces devices that
have extremely stable quiescent Hall output voltages and precise
recoverability after temperature cycling. This technique is made
possible through the use of a BiCMOS process, which allows
the use of low-offset, low-noise amplifiers in combination with
high-density logic integration and sample-and-hold circuits.
Figure 3: Chopper Stabilization Circuit (Dynamic Quadrature Offset Cancellation)
