74HCT4053D
1
CMOS Digital Integrated Circuits Silicon Monolithic
74HCT4053D
74HCT4053D
74HCT4053D
74HCT4053D
Start of commercial production
2016-08
1.
1.
1.
1. Functional Description
Functional Description
Functional Description
Functional Description
• Triple 2-Channel Analog Multiplexer/Demultiplexer
2.
2.
2.
2. General
General
General
General
The 74HCT4053D are high speed CMOS ANALOG MULTIPLEXER/DEMULTIPLEXER fabricated with silicon
gate C
2
MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining
the CMOS low power dissipation.
This device may be used as a level converter for interfacing TTL or NMOS to High Speed CMOS. This inputs
are compatible with TTL, NMOS and CMOS output voltage levels.
The 74HCT4053D has a 2 channel × 3 configuration.
The digital signal to the control terminal turns "ON" the corresponding switch of each channel a large amplitude
signal (V
CC
- V
EE
) can then be switched by the small logical amplitude (V
CC
- GND) control signal.
For example, in the case of V
CC
= 5 V, GND = 0 V, V
EE
= -5 V, signals between -5 V and +5 V can be switched
from the logical circuit with a single power supply of 5 V. As the ON-resistance of each switch is low, they can be
connected to circuits with low input impedance.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
3.
3.
3.
3. Features
Features
Features
Features
(1) Low power dissipation: I
CC
= 4.0 µA (max) (V
CC
= 5.5 V, V
EE
= GND, T
a
= 25 )
(2) Compatible with TTL output: V
IH
= 2.0 V (min), V
IL
= 0.8 V (max)
(3) Wide interfacing ability: LSTTL, NMOS, CMOS
(4) Low ON-resistance: R
ON
= 50 Ω (typ.) at V
CC
- V
EE
= 9 V
(5) High noise immunity: THD = 0.020 % (typ.) at V
CC
- V
EE
= 9 V
(6) Pin and function compatible with 4053B
4.
4.
4.
4. Packaging
Packaging
Packaging
Packaging
2016-09-12
Rev.1.0
©2016 Toshiba Corporation
