6
LTC1550L/LTC1551L
PIN FUNCTIONS
UUU
SHDN: Shutdown (TTL Compatible). This pin is active low
(SHDN) for the LTC1550L and active high (SHDN) for the
LTC1551L. When this pin is at V
CC
(GND for LTC1551L),
the LTC1550L operates normally. When SHDN is pulled
low (SHDN pulled high for LTC1551L), the LTC1550L
enters shutdown mode. In shutdown, the charge pump
stops, the output collapses to 0V, and the quiescent
current drops typically to 0.2µA. The SHDN pin for the
LTC1550L is a high impedance input and has no internal
pull-up. The user must supply a resistor or current source
pull-up to default the LTC1550L into normal operation.
The SHDN pin for the LTC1551L has an internal 5µA
typical pull-down that defaults the LTC1551L into normal
operation.
V
CC
: Power Supply. V
CC
requires an input voltage between
2.7V and 5.25V. Certain combinations of output voltage
and output load current may place additional restrictions
on the required input voltage. Consult the Electrical Char-
acteristics table and Typical Performance Characteristics
for guaranteed test points. The difference between the
input voltage and output should not exceed 10.5V or
damage to the chip may occur. V
CC
must be bypassed
directly to PGND (GND for 8-pin packages) with at least a
0.1µF capacitor placed in close proximity to the chip. A 1µF
or larger low ESR bypass capacitor is recommended to
minimize noise and ripple at the output. A surface mount
ceramic capacitor is recommended.
C1
+
: C1 Positive Input. Connect a 0.1µF capacitor between
C1
+
and C1
–
.
V
OUT
: Negative Voltage Output. This pin must be bypassed
with a 4.7µF or larger capacitor to ensure regulator loop
stability. LTC recommends at least 10µF to achieve the
specified output ripple. The output capacitor should be a
moderate ESR capacitor, and not a very low ESR capaci-
tor, as the zero in the feedback loop (formed by the ESR
and the output capacitor) provides phase lead to the linear
regulator feedback loop. Using very low ESR output ca-
pacitors will result in the output oscillating. A low ESR
0.1µF capacitor is recommended in parallel with the main
output capacitor to minimize high frequency spikes at the
output. The ground connection for the output capacitor
should connect directly to the V
CC
and CP
OUT
bypass
capacitors, as well as to the GND of the LTC1550L/
LTC1551L. LTC recommends a separate trace for the V
OUT
capacitor ground connection to minimize noise.
C1
–
: C1 Negative Input. Connect a 0.1µF capacitor from
C1
+
to C1
–
.
GND: Ground. Connect to a low impedance ground. A
ground plane will help minimize regulation errors.
CP
OUT
: Negative Charge Pump Output. This pin requires a
0.1µF storage capacitor to ground. In order to achieve
ripple on the output voltage of less than 1mV, the ground
connection for the CP
OUT
capacitor must tie directly to the
bottom of the V
CC
bypass capacitor and at the GND pin of
the LTC1550L/LTC1551L. This minimizes the AC current
path for the charge pump.
REG: This is an open-drain output that pulls low when the
output voltage is within 5% of the set value. It will sink 4mA
to ground with a 5V supply. The external circuitry must
provide a pull-up or REG will not swing high. The voltage
at REG may exceed V
CC
and can be pulled up to 6V above
ground without damage. For the LTC1550L adjustable
voltage version, the REG pin is only available in the 16-lead
GN package.
ADJ (for adjustable versions): This is the feedback point
for the external resistor divider string. Connect a divider
string from GND to V
OUT
with the divided tap connected to
ADJ. Note that the resistor string needs to be connected
“upside-down” from a negative regulator. See the Applica-
tions Information section for hook-up details.
GN PACKAGE ONLY
PGND: Power Ground. Connect to a low impedance ground.
PGND should be connected to the same potential as
AGND.
AGND: Analog Ground. Connect to a low impedance
ground. AGND should be connected to a ground plane to
minimize regulation errors.
NC: No Internal Connection.
