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CY7C109B-15ZXC
P1-P3
P4-P6
P7-P9
P10-P10
CY7C109B
CY7C1009B
Document #: 38-05038 Rev
.
*C
Page 4 of 10
Dat
a Retention Characteristics
Over the Operating Range (
Low Power version only
)
Parameter
Description
Conditions
Min.
Max.
Unit
V
DR
V
CC
for Data Retention
No input may exceed V
CC
+ 0.5V
V
CC
= V
DR
= 2.0V
,
CE
1
>
V
CC
– 0.3V or CE
2
<
0.3V
,
V
IN
> V
CC
– 0.3V or V
IN
<
0.3V
2.0
V
I
CCDR
Data Retention Current
150
µ
A
t
CDR
Chip Deselect to Data Retention T
ime
0
ns
t
R
Operation Recovery Time
200
µ
s
Dat
a Retention W
aveform
Switching W
aveforms
Read Cycle No. 1
[10, 1
1]
Read Cycle No. 2 (OE
Controlled)
[1
1, 12]
Notes:
10.
Device is continuously selected. OE
, CE
1
= V
IL
, CE
2
= V
IH
.
11
.
W
E
is HIGH for read cycle.
12.
Address valid prior to o
r coincident with CE
1
transition L
OW and CE
2
transition HIGH.
4.5V
4.5V
CE
V
CC
t
CDR
V
DR
>
2V
DA
T
A RETENTION MODE
t
R
PREVIOUS DATA VALID
DATA VALID
t
RC
t
AA
t
OHA
ADDRESS
DATA OUT
50%
50%
DA
T
A V
ALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
HIGH IMPEDANCE
t
HZOE
t
HZCE
t
PD
HIGH
OE
CE
1
I
CC
I
SB
IMPEDANCE
ADDRESS
CE
2
DA
T
A
OUT
V
CC
SUPPL
Y
CURRENT
[+] Feedback
CY7C109B
CY7C1009B
Document #: 38-05038 Rev
.
*C
Page 5 of 10
Write Cycle No. 1 (CE
1
or CE
2
Controlled)
[13, 14]
Write Cycle No. 2 (WE
Controlled, OE
HIGH During Write)
[13, 14]
Notes:
13.
Data I/O is high impedance if OE
= V
IH
.
14.
If CE
1
goes HIGH or CE
2
goes LOW simult
aneously with WE
going HIGH, the output r
emains in a high-impedance st
ate.
15.
During this period the I/Os are in the output state and
input signals should not be applied.
Switching W
aveforms
(continued)
t
WC
DA
T
A V
ALID
t
AW
t
SA
t
PWE
t
HA
t
HD
t
SD
t
SCE
t
SCE
CE
1
ADDRESS
CE
2
WE
DA
T
A
I/O
t
HD
t
SD
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
SCE
t
WC
t
HZOE
DATA
IN
VALID
CE
1
ADDRESS
CE
2
WE
DATA
I/O
OE
NOTE
15
[+] Feedback
CY7C109B
CY7C1009B
Document #: 38-05038 Rev
.
*C
Page 6 of 10
Write Cycle No. 3 (WE
Controlled, O
E
LOW)
[14]
T
ruth T
able
CE
1
CE
2
OE
WE
I/O
0
–I/O
7
Mode
Power
H
X
X
X
High Z
Power-Down
S
tandby (I
SB
)
X
L
X
X
High
Z
Power-Down
S
tandby (I
SB
)
L
H
L
H
Dat
a Out
Read
Active (I
CC
)
L
H
X
L
Data In
Wri
te
Active (I
CC
)
L
H
H
H
High Z
Selected, Outputs Disabled
Acti
ve (I
CC
)
Switching W
aveforms
(continued)
DATA VALID
t
HD
t
SD
t
LZWE
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
SCE
t
WC
t
HZWE
CE
1
ADDRESS
CE
2
WE
DATA
I/O
NOTE
15
[+] Feedback
P1-P3
P4-P6
P7-P9
P10-P10
CY7C109B-15ZXC
Mfr. #:
Buy CY7C109B-15ZXC
Manufacturer:
Cypress Semiconductor
Description:
IC SRAM 1M PARALLEL 32TSOP I
Lifecycle:
New from this manufacturer.
Delivery:
DHL
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Ups
TNT
EMS
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