Data Sheet ADM1085/ADM1086/ADM1087
Rev. B | Page 13 of 16
DUAL LOFO SEQUENCING
A power sequencing solution for a portable device, such as a
PDA, is shown in Figure 26. This solution requires that the
microprocessor power supply turn on before the LCD display
turns on, and that the LCD display power-down before the
microprocessor powers down. In other words, the last power
supply to turn on is the first one to turn off (LOFO).
An RC network connects the battery and the
SD
input of the
ADP3333 voltage regulator. This causes power-up and power-
down transients to appear at the
SD
input when the battery is
connected and disconnected. The 3.3 V microprocessor supply
turns on quickly on power-up and turns off slowly on power-
down. This is due to two factors: Capacitor C1 charges up to
9 V on power-up and charges down from 9 V on power-down,
and the
SD
pin has logic high and logic low input levels of 2 V
and 0.4 V.
For the display power sequencing, the ADM1085 is equipped
with Capacitor C2 to create the delay between the micro-
processor and display power turning on. When the system is
powered down, the ADM1085 turns off the display power
immediately, while the 3.3 V regulator waits for C1 to discharge
to 0.4 V before switching off.
ADM1086
ENOUT
3.3V
C2
ENIN CEXT
V
IN
C1
DISPLAY
POWER
ADP3333
5VSD
9V
MICROPROCESSOR
POWER
ADP3333
2.5VSD
9
9V
SYSTEM
POWER SWITCH
SYSTEM
POWER
9V
0V
9V
0V
2.5V
0V
5V
0V
V
C1
MICROPROCESSOR
POWER
DISPLAY
POWER
04591-032
Figure 26. Dual LOFO Power-Supply Sequencing
SIMULTANEOUS ENABLING
The enable output can drive multiple enable or shutdown
regulator inputs simultaneously.
3.3V
ADP3333
IN
OUTSD
ADM1085
V
CC
ENOUT
3.3V
3.3V
ENIN CEXT
V
IN
2.5V
ADP3333
IN
OUTSD
ENABLE
CONTROL
12
1.8V
ADP3333
IN
OUTSD
12V
04591-033
Figure 27. Enabling a Pair of Regulators from a Single ADM1085
POWER GOOD SIGNAL DELAYS
Sometimes sequencing is performed by asserting power good
signals when the voltage regulators are already on, rather than
sequencing the power supplies directly. In these scenarios, a
simple sequencer IC can provide variable delays so that
enabling separate circuit blocks can be staggered in time.
For example, in a notebook PC application, a dedicated
microcomputer asserts a power good signal for North Bridge™
and South Bridge™ ICs. The ADM1086 delays the South Bridge
signal, so that it is enabled after the North Bridge.
ADM1086
SOUTH
BRIDGE
IC
ENOUT EN
5V
ENIN CEXT
V
IN
NORTH
BRIDGE
IC
EN
5V
MICROCOMPUTER
5
3.3V
POWER_GOOD
04591-034
Figure 28. Power Good Delay
