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MC100E175FNG

P1-P3P4-P6P7-P8
© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 9
1 Publication Order Number:
MC10E175/D
MC10E175, MC100E175
5VECL 9-Bit Latch With
Parity
Description
The MC10E/100E175 is a 9-bit latch. It also features a tenth latched
output, ODDPAR, which is formed as the odd parity of the nine data
inputs (ODDPAR is HIGH if an odd number of the inputs are HIGH).
The E175 can also be used to generate byte parity by using D8 as the
parity-type select (L = even parity, H = odd parity), and using
ODDPAR as the byte parity output.
The LEN pin latches the data when asserted with a logical high and
makes the latch transparent when placed at a logic low level.
Features
• 9-Bit Latch
• Parity Detection/Generation
• 800 ps Max. D to Output
• Reset
• PECL Mode Operating Range: V
CC
= 4.2 V to 5.5 V
with V
EE
= 0 V
• NECL Mode Operating Range: V
CC
= 0 V
with V
EE
= −4.2 V to −5.5 V
• Internal Input 50 kW Pulldown Resistors
• ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
Charged Device MOdel; > 2 kV
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level:
Pb = 1
Pb−Free = 3
For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 416 devices
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING DIAGRAM*
xxx = 10 or 100
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
PLCC−28
FN SUFFIX
CASE 776
MCxxxE175FNG
AWLYYWW
1
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
MC10E175, MC100E175
http://onsemi.com
2
D
1
Q
8
D
0
V
CCO
Q
0
V
CCO
Q
7
V
CCO
V
CCO
D
8
D
7
D
6
D
5
D
4
D
3
V
EE
LEN
MR
D
2
26
27
28
2
3
4
25 24 23 22 21 20 19
18
17
16
15
14
13
12
11567 8910
Q
6
Q
5
V
CC
Q
4
Q
3
V
CCO
Q
2
Q
1
ODDPAR
1
Pinout: 28-Lead PLCC
(Top View)
* All V
CC
and V
CCO
pins are tied together on the die.
Warning: All V
CC
, V
CCO
, and V
EE
pins must be externally
connected to Power Supply to guarantee proper operation.
Figure 1. 28−Lead Pinout Assignment
D
0
D
8
LEN
MR
Q
0
Q
8
ODDPAR
BITS
1−7
D
EN
Q
R
D
EN
Q
R
D
EN
Q
R
Figure 2. Logic Diagram
Table 1. PIN DESCRIPTION
PIN FUNCTION
D
0
−D
8
LEN
MR
Q
0
−Q
8
ODDPAR
V
CC
, V
CCO
V
EE
NC
ECL Data Inputs
ECL Latch Enable
ECL Master Reset
ECL Data Outputs
ECL Parity Output
Positive Supply
Negative Supply
No Connect
Table 2. FUNCTION TABLE
D EN MR Q ODDPAR
H L L H H if odd no. of Dn HIGH
L L L L H if odd no. of Dn HIGH
X H L Q
0
Q
0
X X H L L
MC10E175, MC100E175
http://onsemi.com
3
Table 3. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
PECL Mode Power Supply V
EE
= 0 V 8 V
V
EE
NECL Mode Power Supply V
CC
= 0 V −8 V
V
I
PECL Mode Input Voltage
NECL Mode Input Voltage
V
EE
= 0 V
V
CC
= 0 V
V
I
v V
CC
V
I
w V
EE
6
−6
V
V
I
out
Output Current Continuous
Surge
50
100
mA
mA
T
A
Operating Temperature Range 0 to +85 °C
T
stg
Storage Temperature Range −65 to +150 °C
q
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
PLCC−28
PLCC−28
63.5
43.5
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−Case) Standard Board PLCC−28 22 to 26 °C/W
T
sol
Wave Solder Pb
Pb−Free
265
265
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 4. 10E SERIES PECL DC CHARACTERISTICS V
CCx
= 5.0 V, V
EE
= 0.0 V (Note 1)
Symbo
l
Characteristic
0°C 25°C 85°C
Uni
t
Min Typ Max Min Typ Max Min Typ Max
I
EE
Power Supply Current 94 113 94 113 94 113 mA
I
EE
Power Supply Current 110 132 110 132 110 132 mA
V
OH
Output HIGH Voltage (Note 2) 3980 4070 4160 4020 4105 4190 4090 4185 4280 mV
V
OL
Output LOW Voltage (Note 2) 3050 3210 3370 3050 3210 3370 3050 3227 3405 mV
V
IH
Input HIGH Voltage 3830 3995 4160 3870 4030 4190 3940 4110 4280 mV
V
IL
Input LOW Voltage 3050 3285 3520 3050 3285 3520 3050 3302 3555 mV
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current 0.5 0.3 0.5 0.25 0.3 0.2
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary −0.46 V / +0.06 V.
2. Outputs are terminated through a 50 W resistor to V
CC
− 2.0 V.
P1-P3P4-P6P7-P8

MC100E175FNG

Mfr. #:
Buy MC100E175FNG
Manufacturer:
ON Semiconductor
Description:
Latches 5V ECL 9-Bit D-Type w/Parity
Lifecycle:
New from this manufacturer.
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