10 BIT LVDS RECEIVER FOR VIDEO
V104
V104 Datasheet 7 2/1/07 Revision 3.0
Integrated Circuit Systems • 525 Race Street, San Jose, CA 95126 • tel (408) 297-1201 • www.icst.com
Thermal Characteristics
Parameter Symbol Min. Typ. Max. Units
Switching Characteristics
CLKOUT Period t
RCP
11.1 T 125.0 ns
CLK IN High Time t
RCH
(T-1)/2 ns
CLK IN Low Time t
RCL
(T-1)/2 ns
TTL Data Setup to CLKOUT t
RS
4.5 ns
TTL Data Hold from CLKOUT t
RH
2.5 ns
TTL Low to High Transition Time t
TLH
1.0 2.0 ns
TTL High to Low Transition Time t
THL
1.0 2.0 ns
Input Data Position0 t
RIP1
-0.25 0.0 +0.25 ns
Input Data Position1 t
RIP0
ns
Input Data Position2 t
RIP6
ns
Input Data Position3 t
RIP5
ns
Input Data Position4 t
RIP4
ns
Input Data Position5 t
RIP3
ns
Input Data Position6 t
RIP2
ns
Phase Lock Loop Set t
RPLL
10.0 ms
CLKIN Period t
RCIP
11.1 125.0 ns
Device-device data output skew 0 1.6 ns
Parameter Symbol Conditions Min. Typ. Max. Units
Thermal Resistance Junction to Ambient θ
JA
Still air 53 °C/W
θ
JA
1 m/s air flow 40 °C/W
θ
JA
3 m/s air flow 33 °C/W
Thermal Resistance Junction to Case θ
JC
8 °C/W
-0.25
t
RCIP
7
t
RCIP
7
+0.25
t
RCIP
7
2
-0.25
t
RCIP
7
2
t
RCIP
7
2
+0.25
t
RCIP
7
3
-0.25
t
RCIP
7
3
t
RCIP
7
3
+0.25
t
RCIP
7
4
-0.25
t
RCIP
7
4
t
RCIP
7
4
+0.25
t
RCIP
7
5
-0.25
t
RCIP
7
5
t
RCIP
7
5
+0.25
t
RCIP
7
6
-0.25
t
RCIP
7
6
t
RCIP
7
6
+0.25
t
RCIP
7
10 BIT LVDS RECEIVER FOR VIDEO
V104
V104 Datasheet 8 2/1/07 Revision 3.0
Integrated Circuit Systems • 525 Race Street, San Jose, CA 95126 • tel (408) 297-1201 • www.icst.com
AC Timing Diagrams
TTL
Outputs
C
L
= 8 pF
TTL Output
20%
80%
t
TLH
t
THL
20%
80%
TTL Output Load
CLK OUT
2.0 V
Rxn
x = A, B, C, D, E
TTL Outputs
2.0 V
2.0 V
0.8 V
0.8 V
0.8 V0.8 V
2.0 V
2.0 V
t
RCP
R/F = L
R/F = H
t
RS
t
RH
t
RCH
t
RCL
n = 0, 1, 2, 3, 4, 5, 6
Phase Lock Loop Set Time
VCC
3.0 V
RCLK+/-
CLKOUT
PD
t
RPLL
2.0 V
2.0 V
10 BIT LVDS RECEIVER FOR VIDEO
V104
V104 Datasheet 9 2/1/07 Revision 3.0
Integrated Circuit Systems • 525 Race Street, San Jose, CA 95126 • tel (408) 297-1201 • www.icst.com
Min 100 µsec
VCC/2
VCC/2
VCC
PVCC
LVCC
PD
Recommended PD Pin Circuit
VCC
PD Pin
100 kohm
0.1 µF
Power Up Sequence
Sequence 1
Sequence 2
VCC
PVCC
LVCC
PD
GND
VCC
3.0 V
VCC
GND
GND

V104YLFT

Mfr. #:
Manufacturer:
IDT
Description:
LVDS Interface IC 10-bit LVDS Receiver
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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