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74FCT377ATSOG8

P1-P3P4-P6
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT377AT/CT/DT
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
1
OCTOBER 2009INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
© 2009 Integrated Device Technology, Inc. DSC-2630/14
FEATURES:
• A, C, and D grades
• Low input and output leakage
≤≤
≤≤
≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility:
–VOH = 3.3V (typ.)
–VOL = 0.3V (typ.)
• High Drive outputs (-15mA IOH, 48mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Power off disable outputs permit "live insertion"
• Available in SOIC and QSOP packages
FUNCTIONAL BLOCK DIAGRAM
IDT74FCT377AT/CT/DT
FAST CMOS OCTAL
D FLIP-FLOP WITH
CLOCK ENABLE
DESCRIPTION:
The IDT74FCT377T is an octal D flip-flop built using an advanced dual
metal CMOS technology. The IDT74FCT377T has eight edge-triggered,
D-type flip-flops with individual D inputs and O outputs. The common
buffered Clock (CP) input loads all flip-flops simultaneously when the Clock
Enable (CE) is low. The register is fully edge-triggered. The state of each
D input, one set-up time before the low-to-high clock transition, is transferred
to the corresponding flip-flop’s O output. The CE input must be stable only
one set-up time prior to the low-to-high transition for predictable operation.
CE
CP
D
CP
Q
D
0
O
0
D
CP
Q
D
1
O
1
D
CP
Q
D
2
O
2
D
CP
Q
D
3
O
3
D
CP
Q
D
4
O
4
D
CP
Q
D
5
O
5
D
CP
Q
D
6
O
6
D
CP
Q
D
7
O
7
INDUSTRIAL TEMPERATURE RANGE
2
IDT74FCT377AT/CT/DT
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
PIN CONFIGURATION
Symbol Description Max Unit
VTERM
(2)
Terminal Voltage with Respect to GND –0.5 to +7 V
VTERM
(3)
Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V
TSTG Storage Temperature –65 to +150 ° C
I
OUT DC Output Current –60 to +120 mA
ABSOLUTE MAXIMUM RATINGS
(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
Symbol Parameter
(1)
Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 6 10 pF
C
OUT Output Capacitance VOUT = 0V 8 12 pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
SOIC/ QSOP
TOP VIEW
2
3
1
16
15
14
11
19
18
20
17
13
12
5
6
7
4
8
9
10
D
1
O
0
D
0
V
CC
O
1
D
3
O
2
D
2
O
3
GND
O
7
O
6
D
7
D
6
O
5
O
4
D
5
D
4
CP
CE
PIN DESCRIPTION
Pin Names Description
D
0 – D7 Data Inputs
CE Clock Enable (Active LOW)
O
0 – O7 Data Outputs
CP Clock Pulse Input
FUNCTION TABLE
(1)
Inputs Outputs
Operating Mode CP CE DO
Load “1” ↑ lh H
Load “0” ↑ ll L
Hold ↑ h X No Change
H H X No Change
NOTE:
1. H = HIGH Voltage Level
h = HIGH Voltage Level one setup time prior to the LOW-to-HIGH Clock Transition
L = LOW Voltage Level
l = LOW Voltage Level one setup time prior to the LOW-to-HIGH Clock Transition
X = Don't Care
↑ = LOW-to-HIGH Clock Transition
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT377AT/CT/DT
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
3
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial : TA = –40°C to +85°C, VCC = 5.0V ± 5%
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
V
IH Input HIGH Level Guaranteed Logic HIGH Level 2 — — V
V
IL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V
I
IH Input HIGH Current
(4)
VCC = Max. VI = 2.7V — — ±1 µ A
I
IL Input LOW Current
(4)
VCC = Max. VI = 0.5V — — ±1 µ A
I
I Input HIGH Current
(4)
VCC = Max., VI = VCC (Max.) — — ±1 µA
V
IK Clamp Diode Voltage VCC = Min., IN = –18mA — –0.7 –1.2 V
IOS Short Circuit Current VCC = Max.
(3)
, VO = GND –60 –120 –225 mA
V
OH Output HIGH Voltage VCC = Min. IOH = –8mA 2.4 3.3 — V
VIN = VIH or VIL IOH = –12mA 2 3 —
VOL Output LOW Voltage VCC = Min. IOL = 48mA — 0.3 0.5 V
V
IN = VIH or VIL
IOFF Input/Output Power Off VCC = 0V, VIN or VO - 4.5V — — ±1 µA
Leakage
(5)
VH Input Hysteresis — — 200 — mV
I
CC Quiescent Power VCC = Max. — 0.01 1 mA
Supply Current VIN = GND or VCC
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = -55°C.
5. This parameter is guaranted but not tested.
P1-P3P4-P6

74FCT377ATSOG8

Mfr. #:
Buy 74FCT377ATSOG8
Manufacturer:
IDT
Description:
Flip Flops OCTAL BI-DIR TRANS
Lifecycle:
New from this manufacturer.
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