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ISL6439IRZ-T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
7
FN9057.6
September 15, 2015
CT1 and CT2
These pins are the connections for the external charge
pump capacitor. A minimum of a 0.1F ceramic capacitor is
recommended for proper operation of the IC.
CPVOUT
This pin represents the output of the charge pump. The
voltage at this pin is the bias voltage for the IC. Connect a
decoupling capacitor from this pin to ground. The value of
the decoupling capacitor should be at least 10x the value of
the charge pump capacitor. This pin may be tied to the
bootstrap circuit as the source for creating the BOOT
voltage.
CPGND
This pin represents the signal and power ground for the
charge pump. Tie this pin to the ground island/plane through
the lowest impedance connection available.
Functional Description
Initialization
The ISL6439 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary.
The Power-On Reset (POR) function continually monitors the
the output voltage of the charge pump. During POR, the charge
pump operates on a free running oscillator. Once the POR level
is reached, the charge pump oscillator is synched to the PWM
oscillator. The POR function also initiates the soft-start
operation after the charge pump output voltage exceeds its
POR threshold.
Soft-Start
The POR function initiates the digital soft-start sequence. The
PWM error amplifier reference is clamped to a level
proportional to the soft-start voltage. As the soft-start voltage
slews up, the PWM comparator generates PHASE pulses of
increasing width that charge the output capacitor(s). This
method provides a rapid and controlled output voltage rise. The
soft start sequence typically takes about 6.5ms.
Figure 1 shows the soft-start sequence for a typical application.
At t0, the +3.3V VCC voltage starts to ramp. At time t1, the
Charge Pump begins operation and the +5V CPVOUT IC bias
voltage starts to ramp up. Once the voltage on CPVOUT
crosses the POR threshold at time t2, the output begins the
soft-start sequence. The triangle waveform from the PWM
oscillator is compared to the rising error amplifier output
voltage. As the error amplifier voltage increases, the pulse-
width on the UGATE pin increases to reach the steady-state
duty cycle at time t3.
Shoot-Through Protection
A shoot-through condition occurs when both the upper
MOSFET and lower MOSFET are turned on simultaneously,
effectively shorting the input voltage to ground. To protect
the regulator from a shoot-through condition, the ISL6439
incorporates specialized circuitry which insures that the
complementary MOSFETs are not ON simultaneously.
The adaptive shoot-through protection utilized by the
ISL6439 looks at the lower gate drive pin, LGATE, and the
upper gate drive pin, UGATE, to determine whether a
MOSFET is ON or OFF. If the voltage from UGATE or from
LGATE to GND is less than 0.8V, then the respective
MOSFET is defined as being OFF and the complementary
MOSFET is turned ON. This method of shoot-through
protection allows the regulator to sink or source current.
Since the voltage of the lower MOSFET gate and the upper
MOSFET gate are being measured to determine the state of
the MOSFET, the designer is encouraged to consider the
repercussions of introducing external components between
the gate drivers and their respective MOSFET gates before
actually implementing such measures. Doing so may
interfere with the shoot-through protection.
Output Voltage Selection
The output voltage can be programmed to any level between
V
IN
and the internal reference, 0.8V. An external resistor
divider is used to scale the output voltage relative to the
reference voltage and feed it back to the inverting input of
the error amplifier, see Figure 2. However, since the value of
R1 affects the values of the rest of the compensation
components, it is advisable to keep its value less than 5k.
R4 can be calculated based on Equation 2:
If the output voltage desired is 0.8V, simply route the output
back to the FB pin through R1, but do not populate R4.
Overcurrent Protection
The overcurrent function protects the converter from a shorted
output by using the upper MOSFET on-resistance, r
DS(ON)
, to
monitor the current. This method enhances the converter’s
efficiency and reduces cost by eliminating a current sensing
resistor.
FIGURE 1. SOFT-START INTERVAL
0V
TIME
T2
T3
T0
CPVOUT (5V)
VCC (3.3V)
V
OUT
(2.50V)
(1V/DIV)
T1
R4
R1 0.8V
V
OUT1
0.8V–
--------------------------------------
=
(EQ. 2)
ISL6439, ISL6439A
8
FN9057.6
September 15, 2015
The overcurrent function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R
OCSET
)
programs the overcurrent trip level (see Typical Application
diagrams on pages 2 and 3). An internal 20A (typical) current
sink develops a voltage across R
OCSET
that is referenced to
V
IN
. When the voltage across the upper MOSFET (also
referenced to V
IN
) exceeds the voltage across R
OCSET
, the
overcurrent function initiates a soft-start sequence.
Figure 3 illustrates the protection feature responding to an
overcurrent event. At time t0, an overcurrent condition is
sensed across the upper MOSFET. As a result, the regulator
is quickly shutdown and the internal soft-start function begins
producing soft-start ramps. The delay interval seen by the
output is equivalent to three soft-start cycles. The fourth
internal soft-start cycle initiates a normal soft-start ramp of
the output, at time t1. The output is brought back into
regulation by time t2, as long as the overcurrent event has
cleared.
Had the cause of the over current still been present after the
delay interval, the over current condition would be sensed
and the regulator would be shut down again for another
delay interval of three soft-start cycles. The resulting hiccup
mode style of protection would continue to repeat
indefinitely.
The overcurrent function will trip at a peak inductor current
(I
PEAK)
determined by Equation 3:
where I
OCSET
is the internal OCSET current source (20A
typical). The OC trip point varies mainly due to the MOSFET
r
DS(ON)
variations. To avoid overcurrent tripping in the
normal operating load range, find the R
OCSET
resistor from
the equation above with:
1. The maximum r
DS(ON)
at the highest junction
temperature.
2. The minimum I
OCSET
from the specification table.
3. Determine I
PEAK
for
,
whereI is the output inductor ripple current.
For an equation for the ripple current see the section under
component guidelines titled ‘Output Inductor Selection’.
A small ceramic capacitor should be placed in parallel with
R
OCSET
to smooth the voltage across
R
OCSET
in the
presence of switching noise on the input voltage.
Current Sinking
The ISL6439 incorporates a MOSFET shoot-through
protection method which allows a converter to sink current
as well as source current. Care should be exercised when
designing a converter with the ISL6439 when it is known that
the converter may sink current.
When the converter is sinking current, it is behaving as a
boost converter that is regulating its input voltage. This
means that the converter is boosting current into the input
rail of the regulator. If there is nowhere for this current to go,
such as to other distributed loads on the rail or through a
voltage limiting protection device, the capacitance on this rail
will absorb the current. This situation will allow the voltage
level of the input rail to increase. If the voltage level of the rail
is boosted to a level that exceeds the maximum voltage
rating of any components attached to the input rail, then
those components may experience an irreversible failure or
experience stress that may shorten their lifespan. Ensuring
FIGURE 2. OUTPUT VOLTAGE SELECTION
+
R1
C
OUT
+3.3V
V
OUT
R4
L
OUT
ISL6439
C4
Q1
FB
UGATE
VCC
BOOT
COMP
D1
R2
C2
C1
R3
C3
PHASE
LGATE
Q2
CPVOUT
VIN
I
PEAK
I
OCSET
x R
OCSET
r
DS ON
-----------------------------------------------------
=
(EQ. 3)
FIGURE 3. OVER CURRENT PROTECTION RESPONSE
0V
TIME
V
OUT
(2.5V)
T1
T0 T2
Internal Soft-Start Function
Delay Interval
I
PEAK
I
OUT MAX
I
2
----------
+
ISL6439, ISL6439A
9
FN9057.6
September 15, 2015
that there is a path for the current to flow other than the
capacitance on the rail will prevent this failure mode.
Application Guidelines
Layout Considerations
Layout is very important in high frequency switching
converter design. With power devices switching efficiently at
300kHz or 600kHz, the resulting current transitions from one
device to another cause voltage spikes across the
interconnecting impedances and parasitic circuit elements.
These voltage spikes can degrade efficiency, radiate noise
into the circuit, and lead to device overvoltage stress.
Careful component layout and printed circuit board design
minimizes the voltage spikes in the converters.
As an example, consider the turn-off transition of the PWM
MOSFET. Prior to turn-off, the MOSFET is carrying the full load
current. During turn-off, current stops flowing in the MOSFET
and is picked up by the lower MOSFET. Any parasitic
inductance in the switched current path generates a large
voltage spike during the switching interval. Careful component
selection, tight layout of the critical components, and short, wide
traces minimizes the magnitude of voltage spikes.
There are two sets of critical components in a DC/DC
converter using the ISL6439. The switching components are
the most critical because they switch large amounts of
energy, and therefore tend to generate large amounts of
noise. Next are the small signal components which connect
to sensitive nodes or supply critical bypass current and
signal coupling.
A multi-layer printed circuit board is recommended. Figure 4
shows the connections of the critical components in the
converter. Note that capacitors C
IN
and C
OUT
could each
represent numerous physical capacitors. Dedicate one solid
layer, usually a middle layer of the PC board, for a ground
plane and make all critical component ground connections
with vias to this layer. Dedicate another solid layer as a
power plane and break this plane into smaller islands of
common voltage levels. Keep the metal runs from the
PHASE terminals to the output inductor short. The power
plane should support the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers for the phase nodes. Use the remaining printed
circuit layers for small signal wiring. The wiring traces from
the GATE pins to the MOSFET gates should be kept short
and wide enough to easily handle the 1A of drive current.
The switching components should be placed close to the
ISL6439 first. Minimize the length of the connections between
the input capacitors, C
IN
, and the power switches by placing
them nearby. Position both the ceramic and bulk input
capacitors as close to the upper MOSFET drain as possible.
Position the output inductor and output capacitors between the
upper MOSFET and lower MOSFET and the load.
The critical small signal components include any bypass
capacitors, feedback components, and compensation
components. Position the bypass capacitor, C
BP
, close to
the VCC pin with a via directly to the ground plane. Place the
PWM converter compensation components close to the FB
and COMP pins. The feedback resistors for both regulators
should also be located as close as possible to the relevant
FB pin with vias tied straight to the ground plane as required.
Feedback Compensation
Figure 5 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(V
OUT
) is regulated to the Reference voltage level. The
error amplifier (Error Amp) output (V
E/A
) is compared with
the oscillator (OSC) triangular wave to provide a pulse-
width modulated (PWM) wave with an amplitude of V
IN
at
the PHASE node. The PWM wave is smoothed by the output
filter (L
O
and C
O
).
The modulator transfer function is the small-signal transfer
function of V
OUT
/V
E/A
. This function is dominated by a DC
Gain and the output filter (L
O
and C
O
), with a double pole
break frequency at F
LC
and a zero at F
ESR
. The DC Gain of
V
OUT
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT PLANE LAYER
L
OUT
C
OUT
C
IN
+3.3V V
IN
KEY
COMP
ISL6439
UGATE
R4
R
2
C
BP
FB
GND
CPVOUT
FIGURE 4. PRINTED CIRCUIT BOARD POWER PLANES
AND ISLANDS
R
1
BOOT
C
2
VIA CONNECTION TO GROUND PLANE
LOAD
Q1
C
BOOT
PHASE
D1
R
3
C
3
C
1
Q2
LGATE
PHASE
VCC
C
VCC
ISL6439, ISL6439A
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

ISL6439IRZ-T

Mfr. #:
Buy ISL6439IRZ-T
Manufacturer:
Renesas / Intersil
Description:
Switching Controllers 300 KHZ SINGLE PWM W/CHRG PUMP 16LD
Lifecycle:
New from this manufacturer.
Delivery:
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