ISL6118HIBZA-T

1
FN9008.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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ISL6118
Dual Power Supply Controller
The ISL6118 is a dual channel, fully independent overcurrent
(OC) fault protection IC for the +2.5V to +5.5V environment.
This device features internal current monitoring, accurate
current limiting, integrated power switches and current
limited delay to latch-off for system protection.
The ISL6118 current sense and limiting circuitry sets the
current limit to a nominal 0.6A, which is well suited for the
3.3V AUX ACPI application. The ISL6118 is the ideal
companion chip to the HIP1011D and HIP1011E dual PCI
hot plug controllers. Together these and the ISL6118 fully
control the four legacy PCI voltages (±12V, +3.3V, +5V) and
the 3.3V AUX, respectively, for power control of two PCI
slots compliant to PCI Bus Power Management Interface
Spec Rev 1.1. Designed to be co-located with the HIP1011D
on the motherboard, the ISL6118 provides OC fault
notification, accurate current limiting and a consistent timed
latch-off thus isolating and protecting the voltage bus in the
presence of an OC event or short circuit during all PCI Bus
Power States as defined by the PCI specification. The 12ms
time to latch-off is independent of the adjoining switch’s
electrical or thermal condition and the OC response time is
inversely related to the OC magnitude.
Each ISL6118 incorporates in a single 8-lead SOIC
package two 80m N-channel MOSFET power switches
for power control. Each switch is driven by a constant
current source giving a controlled ramp up of the output
voltage. This provides a soft start turn-on eliminating bus
voltage drooping caused by inrush current while charging
heavy load capacitances. Independent enabling inputs and
fault reporting outputs for each channel are compatible with
3V and 5V logic to allow external control and monitoring.
The ISL6118 undervoltage (UV) feature prevents turn-on of
the outputs unless the correct ENABLE state and
VIN > 2.5V are present. During initial turn-on the ISL6118
prevents fault reporting by blanking the fault signal. Rising
and falling outputs are current-limited voltage ramps so that
both the inrush current and voltage slew rate are limited,
independent of load. This reduces supply droop due to
surge and eliminates the need for external EMI filters.
During operation, once an OC condition is detected the
appropriate output is current limited for 12ms to allow
transient conditions to pass. If still in current limit after the
current limit period has elapsed, the output is latched off
and the fault is reported by pulling the corresponding
FAULT
low. The FAULT signal is latched low until reset by
the ENABLE signal being de-asserted at which time the
FAULT
signal will clear.
Features
80m Integrated Power N-Channel MOSFET Switches
Accurate Current Sensing and Limiting
12ms Fault Delay to Latch-Off, No Thermal Dependency
2.5V to 5.5V Operating Range
Disabled Output Internally Pulled Low
Undervoltage Lockout
Controlled Turn-On Ramp Time
Channel Independent Fault Output Signals
Channel Independent Logic Level Enable High Inputs
(ISL6118H) or Enable Low Inputs (ISL6118L)
Pb-Free Package Options Available
Tape & Reel Packing with ‘-T’ Part Number Suffix
Applications
ACPI 3.3V AUX Control
Electronic Circuit Limiting and Breaker
Pinout
ISL6118 (SOIC)
TOP VIEW
Ordering Information
PART #
TEMP.
RANGE (°C) PKG.
PKG.
DWG. #
ISL6118LIB -40 to 85 8 Ld SOIC M8.15
ISL6118LIBZA (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15
ISL6118HIB -40 to 85 8 Ld SOIC M8.15
ISL6118HIBZA (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15
ISL6118EVAL1 ISL6118 Evaluation Platform
ISL6AHPEVAL1 ACPI (HIP1011D and ISL6118H) Evaluation
Platform
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which is compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J Std-020B.
GND
VIN
ENABLE_1
ENABLE_2
1
2
3
4
8
7
6
5
FAULT_1
OUT_1
OUT_2
FAULT_2
Data Sheet March 2004
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Simplified Block Diagram
GND
VIN
EN_1
EN_2 FAULT_2
OUT_2
OUT_1
FAULT_1
Q-PUMP
CURRENT AND TEMP.
POR
CHANNEL 1 LIKE CHANNEL 2
MONITORING, GATE AND
OUTPUT CONTROL
LOGIC
Pin Descriptions
PIN NO. DESIGNATOR FUNCTION DESCRIPTION
1 GND IC Reference
2 VIN Chip Bias, Controlled
Supply Input,
Undervoltage Lock-Out
VIN provides chip bias voltage. At VIN < 2.5V chip functionality is disabled, FAULT_X latch
is cleared and floating and OUT is held low.
3, 4 ENABLE_1, 2/
ENABLE_1, 2
Channel Enable/
Enable not Inputs
Enables/Disables switch.
5, 8 F
AULT OUT_2, 1 Channel 2, 1
Overcurrent Fault not
Indicator
Channel overcurrent fault-not indicator. FAULT floats and is disabled until VIN > 2.5V. This
output is pulled low after the OC timeout period has expired and stays latched until ENABLE
is deasserted.
6, 7 OUT_2, 1 Channel 2,1 Controlled
Supply Output
Channel voltage output, connect to load to protect. Upon an OC condition OUT is current
limited to 0.6A. Current limit response time is within 200µs. This output will remain in current
limit for a determined time before being latched off.
ISL6118
3
Absolute Maximum Ratings Thermal Information
Supply Voltage (VIN to GND). . . . . . . . . . . . . . . . . . . . . . . . . . . 6.0V
EN, FAULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND-0.3V to VIN +0.3V
Output Current . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protected
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . 3KV
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
Supply Voltage Range (Typical). . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Thermal Resistance (Typical, Note 1)
JA
(°C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C
Maximum Storage Temperature Range. . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. All voltages are relative to GND, unless otherwise specified.
Electrical Specifications Supply Voltages = 3.3V, T
A
= T
J
= -40 to 85°C, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
POWER SWITCH
ISL6118 On Resistance at 2.7V r
DS(ON)_27
VIN = 2.7V, I
OUT
= 0.4A, T
A
= T
J
= 25°C - 90 105 m
T
A
= T
J
= 85°C - 115 130 m
ISL6118 On Resistance at 3.3V r
DS(ON)_33
VIN = 3.3V, I
OUT
= 0.4A, T
A
= T
J
= 25°C - 80 100 m
T
A
= T
J
= 85°C - 115 130 m
ISL6118 On Resistance at 5.0V r
DS(ON)_50
VIN = 5V, I
OUT
= 0.4A, T
A
= T
J
= 25°C - 80 95 m
T
A
= T
J
= 85°C - 115 130 m
Disabled Output Voltage V
OUT_DIS
VIN = 5V, Switch Disabled, 50A Load - 300 450 mV
OUT Rising Rate t_vout_rt R
L
= 10C
L
= 0.1F, 10%-90% - 8 - V/ms
Slow V
OUT
Turn-off Rate t_svout_offt R
L
= 10C
L
= 0.1F, 90%-10% - 8 - V/ms
Fast V
OUT
Turn-off Rate t_fvout_offt R
L
= 1C
L
= 0.1F, 90%-10% - 4 - V/s
CURRENT CONTROL
Current Limit, VIN = 3.3V - 5V Ilim V
OUT
= 0.8V 0.45 0.6 0.75 A
OC Regulation Settling Time tsett
Ilim
R
L
= 3C
L
= 0.1F to within 10% of CR - 2 - ms
Severe OC Regulation Settling Time tsett
Ilim_sev
R
L
< 1C
L
= 0.1F to within 10% of CR - 100 - s
Overcurrent Latch-off Time t
OC_loff
ISL6118X, T
J
= 25°C - 12 - ms
I/O PARAMETERS
Fault Output Voltage V
FAULT
Fault Output Current = 10mA - - 0.4 V
ENABLE High Threshold Ven_vih VIN = 5.5V 2.0 - - V
ENABLE Low Threshold at 2.7V Ven_vil VIN = 2.7V - - 0.6 V
ENABLE Low Threshold at 5.5V Ven_vil VIN = 5.5V - - 0.8 V
ENABLE Input Current Ien_i ENABLE = 0V to 5V, VIN = 5V, T
J
> 25°C -0.5 0 0.5 A
BIAS PARAMETERS
Enabled VIN Current I
VDD
Switches Closed, OUTPUT = OPEN, T
J
> 0°C - 120 200 A
Disabled VIN Current I
VDD
Switches Open, OUTPUT = OPEN - 1 5 A
Undervoltage Lockout Threshold V
UVLH
VIN Rising, Switch Enabled 1.7 2.25 2.5 V
UV Hysteresis UV
HYS
50 100 - mV
Over Temperature Disable Temp_dis - 150 - °C
ISL6118

ISL6118HIBZA-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Switching Controllers W/ANNEAL 3 3V AUX HOT SWAP ENABLE HI
Lifecycle:
New from this manufacturer.
Delivery:
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