The Smart Timing Choice
The Smart Timing Choice
SiTime Corporation 990 Almanor Avenue Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com
Rev. 1.11 Revised March 4, 2013
SiT8256
0.3 ps Jitter Oscillator for Networking
Notes:
1. All electrical specifications in the above table are specified with 15 pF output load and for all Vdd(s) unless otherwise stated.
2. Contact SiTime for custom drive strength to drive higher or multiple load, or SoftEdge™ option for EMI reduction.
Features Applications
156.250000 MHz, 156.253906 MHz, 156.257800 MHz,
156.257812 MHz, 156.261718 MHz for Ethernet applications
SATA, SAS, Ethernet, 10Gb Ethernet, XAUI
100% pin-to-pin drop-in replacement to quartz-based oscillators Computing, storage, networking, telecom, industrial control
Ultra low phase jitter: 0.3 ps
Frequency stability as low as ±10 PPM
Industrial or extended commercial temperature range
LVCMOS/LVTTL compatible output
Standby or output enable modes
Standard 4-pin packages: 2.5 x 2.0, 3.2 x 2.5, 5.0 x 3.2, 7.0 x 5.0 mm
2
Outstanding silicon reliability of 2 FIT or 500 million hour MTBF
Pb-free, RoHS and REACH compliant
Ultra short lead time
Electrical Characteristics
Parameter Symbol Min. Typ. Max. Unit Condition
Output Frequency Range f
156.250000, 156.253906
156.257800, 156.257812
156.261718
MHz
Frequency Stability F_stab -10 – +10 PPM
Inclusive of Initial tolerance at 25 °C, and variations over
operating temperature, rated power supply voltage and load
-20 – +20 PPM
-25 – +25 PPM
-50 – +50 PPM
Operating Temperature Range T_use -20 – +70 °C Extended Commercial
-40 – +85 °C Industrial
Supply Voltage Vdd 1.71 1.8 1.89 V Supply voltages between 2.5V and 3.3V can be supported.
Contact SiTime for additional information.
2.25 2.5 2.75 V
2.52 2.8 3.08 V
2.97 3.3 3.63 V
Current Consumption Idd – 31 33 mA No load condition, Vdd = 2.5V, 2.8V or 3.3V
– 29 31 mA No load condition, Vdd = 1.8V
OE Disable Current I_OD – – 31 mA
Vdd = 2.5V, 2.8V or 3.3V, OE = GND, output is Weakly Pulled Down
––30mA
Vdd = 1.8 V. OE = GND, output is Weakly Pulled Down
Standby Current I_std – – 70 A
Vdd = 2.5V, 2.8V or 3.3V, ST = GND, output is Weakly Pulled Down
––10A
Vdd = 1.8 V. ST = GND, output is Weakly Pulled Down
Duty Cycle DC 45 – 55 %
Rise/Fall Time Tr, Tf – 1.2 2 ns 15 pF load, 10% - 90% Vdd
– 2.2 – ns 30 pF load, 10% - 90% Vdd
– 3.4 – ns 45 pF load, 10% - 90% Vdd
Output Voltage High VOH 90% – – Vdd IOH = -6 mA, IOL = 6 mA, (Vdd = 3.3V, 2.8V, 2.5V)
IOH = -3 mA, IOL = 3 mA, (Vdd = 1.8V)
Output Voltage Low VOL– –10%Vdd
Input Voltage High VIH 70% – – Vdd Pin 1, OE or ST
Input Voltage Low VIL – – 30% Vdd Pin 1, OE or ST
Input Pull-up Impedance Z_in – 100 250 kΩ Pin 1, OE logic high or logic low, or ST logic high
2––MΩ Pin 1, ST logic low
Startup Time T_start – 7 10 ms Measured from the time Vdd reaches its rated minimum value
OE Enable/Disable Time T_oe – – 150 ns
Resume Time T_resume – 6 10 ms In standby mode, measured from the time ST pin crosses
50% threshold. Refer to Figure 5.
RMS Period Jitter T_jitt – 1.5 2 ps Vdd = 2.5V, 2.8V or 3.3V
– 2 3 ps Vdd = 1.8V
RMS Phase Jitter (random) T_phj – 0.25 0.3 ps IEEE802.3-2005 10GbE jitter measurement specifications
First year Aging F_aging -1.5 – +1.5 PPM 25°C
10-year Aging -5 – +5 PPM 25°C