1/10February 2003
■ 5V TOLERANT INPUTS AND OUTPUTS
■ HIGH SPEED :
t
PD
= 5.4 ns (MAX.) at V
CC
=3V
■ POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
|=I
OL
= 24mA (MIN) at V
CC
=3V
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
■ OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16373
■ LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
■ ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LCX16373 is a low voltage CMOS 16 BIT
D-TYPE LATCH with 3 STATE OUTPUTS NON
INVERTING fabricated with sub-micron silicon
gate and double-layer metal wiring C
2
MOS
technology. It is ideal for low power and high
speed 3.3V applications; it can be interfaced to 5V
signal environment for both inputs and outputs.
These 16 bit D-TYPE latches are byte controlled
by two latch enable inputs (nLE) and two output
enable inputs(OE
).
While the nLE input is held at a high level, the nQ
outputs will follow the data input precisely.
When the nLE is taken LOW, the nQ outputs will
be latched precisely at the logic level of D input
data.
While the (nOE
) input is low, the nQ outputs will be
in a normal logic state (high or low logic level) and
while high level the outputs will be in a high imped-
ance state.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
74LCX16373
LOW VOLTAGE CMOS 16-BIT D-TYPE LATCH (3-STATE)
WITH 5V TOLERANT INPUTS AND OUTPUTS
ORDER CODES
PACKAGE TUBE T & R
TSSOP 74LCX16373TTR
TSSOP
PIN CONNECTION
Obsolete Product(s) - Obsolete Product(s)
