FDZ7064N Rev D4 (W)
Electrical Characteristics T
A
= 25°C unless otherwise noted
Symbol Parameter Test Conditions Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain–Source Breakdown Voltage V
GS
= 0 V, I
D
= 250 µA 30 V
∆BVDSS
∆T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250 µA, Referenced to 25°C
21
mV/°C
I
DSS
Zero Gate Voltage Drain Current V
DS
= 24 V, V
GS
= 0 V 1 µA
I
GSSF
Gate–Body Leakage, Forward V
GS
= 12 V, V
DS
= 0 V 100 nA
I
GSSR
Gate–Body Leakage, Reverse V
GS
= –12 V, V
DS
= 0 V –100 nA
On Characteristics (Note 2)
V
GS(th)
Gate Threshold Voltage V
DS
= V
GS
, I
D
= 250 µA 0.8 1.2 2.0 V
∆VGS(th)
∆T
J
Gate Threshold Voltage
Temperature Coefficient
I
D
= 250 µA, Referenced to 25°C
–4.6
mV/°C
R
DS(on)
Static Drain–Source
On–Resistance
V
GS
= 4.5 V, I
D
= 13.5 A
V
GS
= 10 V, I
D
= 14.5 A
V
GS
= 4.5 V, I
D
= 13.5A, T
J
=125°C
6.1
5.4
9.0
8.0
7.0
13
mΩ
g
FS
Forward Transconductance V
DS
= 10 V, I
D
= 13.5 A 92 S
Dynamic Characteristics
C
iss
Input Capacitance 3843 pF
C
oss
Output Capacitance 522 pF
C
rss
Reverse Transfer Capacitance
V
DS
= 15 V, V
GS
= 0 V,
f = 1.0 MHz
209 pF
Switching Characteristics (Note 2)
t
d(on)
Turn–On Delay Time 10 20 ns
t
r
Turn–On Rise Time 9 18 ns
t
d(off)
Turn–Off Delay Time 71 114 ns
t
f
Turn–Off Fall Time
V
DD
= 15 V, I
D
= 1 A,
V
GS
= 10 V, R
GEN
= 6 Ω
18 32 ns
Q
g
Total Gate Charge 31 43 nC
Q
gs
Gate–Source Charge 8 nC
Q
gd
Gate–Drain Charge
V
DS
= 15 V, I
D
= 13.5 A,
V
GS
= 4.5 V
7.4 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current 1.8 A
V
SD
Drain–Source Diode Forward
Voltage
V
GS
= 0 V, I
S
= 1.8 A (Note 2)
0.7
1.2
V
t
rr
Diode Reverse Recovery Time 30 nS
Q
rr
Diode Reverse Recovery Charge
I
F
= 13.5 A,
d
iF
/d
t
= 100 A/µs
35 nC
Notes:
1. R
θJA
is determined with the device mounted on a 1 in² 2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. The thermal resistance from the junction to the
circuit board side of the solder ball, R
θJB
, is defined for reference. For R
θJC
, the thermal reference point for the case is defined as the top surface of the copper
chip carrier. R
θJC
and R
θJB
are guaranteed by design while R
θJA
is determined by the user's board design.
a) 56°C/W when
mounted on a 1in
2
pad
of 2 oz copper
b) 119°C/W when mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2.Pulse Test: Pulse Width <
300µs, Duty Cycle < 2.0%
