ADM1270 Data Sheet
Rev. A | Page 18 of 21
When the voltage across the sense resistor reaches the circuit
breaker trip voltage, V
CB
, the 20 µA TIMER pull-up current is
activated. The ADM1270 begins to regulate the load current at
the current limit, initiating a rising voltage ramp on the TIMER
pin. If the sense voltage falls below this circuit breaker trip voltage
before the TIMER pin reaches V
TIMERH
, the 20 µA pull-up current is
disabled, and the 1 µA pull-down current is enabled. If the voltage
on the TIMER pin falls below V
TIMERL
, the TIMER pin is
discharged to GND using a strong pull-down current on the
TIMER pin.
However, if the overcurrent condition is continuous and the sense
voltage remains above the circuit breaker trip voltage, the 20 µA
pull-up current remains active, and the FET remains in
regulation. This condition allows the TIMER pin to reach V
TIMERH
and to initiate the GATE shutdown, and the
FAULT
pin is pulled
low immediately.
The circuit breaker trip voltage is not the same as the hot swap
sense voltage current limit. There is a small circuit breaker offset,
V
CBOS
, which causes the timer to start shortly before the current
reaches the defined current limit.
In latch-off mode, the TIMER pin is discharged to GND when
it reaches the V
TIMERH
threshold. The TIMER_OFF pin begins to
charge up. While the TIMER_OFF pin is ramping up, the hot swap
controller remains off and cannot be turned back on, and the
FAULT
pin remains low. When the voltage on the TIMER_OFF
pin rises above the V
TMROFFH
threshold, the hot swap controller
can be reenabled by toggling the ENABLE pin from high to low
and then high again.
TIMER_OFF
The TIMER_OFF pin handles two timing functions with an
external capacitor, C
TIMER_OFF
. There is one TIMER_OFF pin
comparator threshold at V
TMROFFH
(2.0 V). There are two timing
current sources, a 20 µA pull-up current and a 1 µA pull-up
current.
These current and voltage levels, in combination with the user
chosen value of C
TIMER_OFF
, determine the initial power-on reset
time and also set the fault current-limit off time.
When VCC is connected to the input supply, the internal supply
(VCAP) of the ADM1270 must charge up. VCAP starts up and
settles in a very short time. When the UVLO threshold voltage is
exceeded at VCAP, the device emerges from reset. During this first
brief reset period, the GATE and TIMER pins are both held low.
The ADM1270 then proceeds through an initial timing cycle.
The TIMER_OFF pin is pulled high with 20 µA. When the
TIMER_OFF pin reaches the V
TMROFFH
threshold (2.0 V), the
initial timing cycle is complete. This initial power-on reset
duration is determined by the following equation:
t
INITIAL
= V
TMROFFH
× (C
TIMER_OFF
/20 µA)
For example, a 100 nF capacitor results in a delay of approximately
10 ms. If the UV and OV inputs indicate that VCC is within the
defined window of operation when the initial timing cycle
terminates, the device is ready to start a hot swap operation.
At the completion of this initial power-on reset cycle, the
TIMER_OFF pin is ready to perform a second function. When
the voltage at the TIMER pin exceeds the fault current-limit
time threshold voltage of V
TIMERH
(2.0 V), the 1 µA pull-up
current is activated on TIMER_OFF, and C
TIMER_OFF
begins to
charge initiating a voltage ramp on the TIMER_OFF pin. When
the TIMER_OFF pin reaches V
TMROFFH
, the TIMER_OFF fault
current-limit off time is complete.
This fault current-limit off time is determined by the following
equation:
t
TIMER_OFF
= V
TMROFFH
× (C
TIMER_OFF
/1 µA)
For example, a 100 nF capacitor results in an off time of
approximately 200 ms from the time that TIMER exceeds
V
TIMERH
to the time that TIMER_OFF reaches V
TMROFFH
.
HOT SWAP RETRY DUTY CYCLE
The ADM1270 turns off the FET after an overcurrent fault and
then uses the capacitor on the TIMER_OFF pin to generate a
delay before automatically retrying the hot swap operation. To
configure the ADM1270 for automatic retry mode, tie the
FAULT
pin to the ENABLE pin. Note that a pull-up resistor to VCAP is
required on the
FAULT
pin.
When an overcurrent fault occurs, the capacitor on the TIMER
pin charges with a 20 µA pull-up current. When the TIMER pin
reaches V
TIMERH
(2.0 V), the GATE pin is pulled high, turning
off the FET. When the
FAULT
pin is tied to the ENABLE pin
for automatic retry mode, the TIMER_OFF pin begins to
charge with a 1 µA current source. When the TIMER_OFF pin
reaches V
TMROFFH
(2.0 V), the ADM1270 automatically restarts
the hot swap operation.
The automatic retry duty cycle is set by the ratio of 1 µA/20 µA
and the ratio of C
TIMER
/C
TIMER_OFF
. The retry duty cycle is set by
the following equation:
Duty_Cycle = (C
TIMER
× 1 µA)/(C
TIMER_OFF
× 20 µA)
The value of the CTIMER and CTIMER_OFF capacitors
determine the on and off time of this cycle, which are calculated
as follows:
t
ON
= V
TIMERH
× (C
TIMER
/20 µA)
t
OFF
= V
TMROFFH
× (C
TIMER_OFF
/1 µA)
A 100 nF capacitor on the TIMER pin gives an on time of
10 ms. A 100 nF capacitor on the TIMER_OFF pin gives an off
time of 200 ms. The device retries continuously in this manner
and can be disabled manually by holding the ENABLE pin low,
or by disconnecting the
FAULT
pin. To prevent thermal stress
in the FET, a capacitor on the TIMER_OFF pin can be used to
extend the retry time to any desired level.
