LT3782A
10
3782afc
For more information www.linear.com/LT3782A
Slope Compensation
The LT3782A is designed for high voltage and/or high
current applications, and very often these applications
generate noise spikes that can be picked up by the cur
-
rent sensing amplifier and cause switching jitter. To
avoid
switching jitter, careful layout is absolutely necessary to
minimize the current sensing noise pickup. Sometimes
increasing slope compensation to overcome the noise
can help to reduce jitter. The built-in slope compensa
-
tion can
be increased by adding a resistor R
SLOPE
from
SLOPE pin to ground. Note that smaller R
SLOPE
increases
slope compensation and the minimum R
SLOPE
allowed is
R
FREQ
/2.
Layout Considerations
To prevent EMI, the power MOSFETs and input bypass
capacitor leads should be kept as short as possible. A
ground plane should be used under the switching circuitry
to prevent interplane coupling and to act as a thermal
spreading path. Note that the bottom pad of the package
is the heat sink, as well as the IC signal ground, and must
be soldered to the ground plane.
In a boost converter, the conversion gain (assuming 100%
efficiency) is calculated as (ignoring the forward voltage
drop of the boost diode):
V
OUT
V
IN
=
1
1D
where D is the duty ratio of the main switch. D can then
be estimated from the input and output voltages:
D = 1
V
IN
V
OUT
;D
MAX
= 1
V
IN(MIN)
V
OUT
The Peak and Average Input Currents
The control circuit in the LT3782A measures the input
current by using a sense resistor in each MOSFET source,
so the output current needs to be reflected back to the
input in order to dimension the power MOSFET properly.
applicaTions inForMaTion
Based on the fact that, ideally, the output power is equal
to the input power, the maximum average input current is:
I
IN(MAX)
=
I
O(MAX)
1 D
MAX
The peak current is:
I
IN(PEAK)
= 1.2
I
O(MAX)
1 D
MAX
The maximum duty cycle, D
MAX
, should be calculated at
minimum V
IN
.
Power Inductor Selection
In a boost circuit, a power inductor should be designed
to carry the maximum input DC current. The inductance
should be small enough to generate enough ripple current
to provide adequate signal to noise ratio to the LT3782A.
An empirical starting of the inductor ripple current (per
phase) is about 40% of maximum DC current, which is
half of the input DC current in a 2-phase circuit:
ΔI
L
40%
I
OUT(MAX)
V
OUT
2V
IN
= 20%
I
OUT(MAX)
V
OUT
V
IN
where V
IN
, V
OUT
and I
OUT
are the DC input voltage, output
voltage and output current, respectively.
And the inductance is estimated to be:
L =
V
IN
D
f
s
ΔI
L
where f
s
is the switching frequency per phase.
The saturation current level of inductor is estimated to be:
I
SAT
ΔI
L
2
+
I
IN
2
70%
I
OUT(MAX)
V
OUT
V
IN(MIN)
LT3782A
11
3782afc
For more information www.linear.com/LT3782A
Sense Resistor Selection
During the switch on-time, the control circuit limits the
maximum voltage drop across the sense resistor to about
63mV. The peak inductor current is therefore limited to
63mV/R. The relationship between the maximum load
current, duty cycle and the sense resistor R
SENSE
is:
R V
SENSE(MAX)
1 D
MAX
1.2
I
O(MAX)
2
Power MOSFET Selection
Important parameters for the power MOSFET include the
drain-to-source breakdown voltage (BV
DSS
), the threshold
voltage (V
GS(TH)
), the on-resistance (R
DS(ON)
) versus gate-
to-source voltage, the gate-to-source and gate-to-drain
charges (Q
GS
and Q
GD
, respectively), the maximum drain
current (I
D(MAX)
) and the MOSFET’s thermal resistances
(R
TH(JC)
and R
TH(JA)
).
The gate drive voltage is set by the 10V GBIAS regulator.
Consequently, 10V rated MOSFETs are required in most
high voltage LT3782A applications.
Pay close attention to the BV
DSS
specifications for the
MOSFETs relative to the maximum actual switch voltage
in the application. The switch node can ring during the
turn-off of the MOSFET due to layout parasitics. Check
the switching waveforms of the MOSFET directly across
the drain and source terminals using the actual PC board
layout (not just on a lab breadboard!) for excessive ringing.
Calculating Power MOSFET Switching and Conduction
Losses and Junction Temperatures
In order to calculate the junction temperature of the power
MOSFET, the power dissipated by the device must be known.
This power dissipation is a function of the duty cycle, the
load current
and the junction temperature itself (due to
the
positive temperature coefficient of its R
DS(ON)
). As a
result, some iterative calculation is normally required to
determine a reasonably accurate value. Care should be
taken to ensure that the converter is capable of delivering
the required load current over all operating conditions (line
voltage and temperature), and for the worst-case speci-
fications for V
SENSE(MAX)
and the R
DS(ON)
of the MOSFET
listed in the manufacturer’s data sheet.
The power dissipated by the MOSFET in a 2-phase boost
converter is:
P
FET
=
I
O(MAX)
2
1 D
( )
2
R
DS(ON)
D ρ
T
+k V
O
2
I
O(MAX)
2
1 D
( )
C
RSS
f
The first term in the equation above represents the I
2
R
losses in the device, and the second term, the switching
losses. The constant, k = 1.7, is an empirical factor inversely
related to the gate drive current and has the dimension
of 1/current. The ρ
T
term accounts for the temperature
coefficient of the R
DS(ON)
of the MOSFET, which is typically
0.4%/°C. Figure 4 illustrates the variation of normalized
R
DS(ON)
over temperature for a typical power MOSFET.
applicaTions inForMaTion
JUNCTION TEMPERATURE (°C)
–50
ρ
T
NORMALIZED ON RESISTANCE
1.0
1.5
150
3782A F04
0.5
0
0
50
100
2.0
Figure 4. Normalized R
DS(ON)
vs Temperature
LT3782A
12
3782afc
For more information www.linear.com/LT3782A
From a known power dissipated in the power MOSFET, its
junction temperature can be obtained using the following
formula:
T
J
= T
A
+ P
FET
R
TH(JA)
The R
TH(JA)
to be used in this equation normally includes
the R
TH(JC)
for the device plus the thermal resistance from
the case to the ambient temperature (R
TH(CA)
). This value
of T
J
can then be compared to the original, assumed value
used in the iterative calculation process.
Input Capacitor Choice
The input capacitor must have high enough voltage and
ripple current ratings to handle the maximum input voltage
and RMS ripple current rating. The input ripple current in
a boost circuit is very small because the input current is
continuous. With 2-phase operation, the ripple cancellation
will further reduce the input capacitor ripple current rating.
The ripple current is plotted in Figure 5. Please note that
the ripple current is normalized against:
I
norm
=
V
IN
L f
s
Output Capacitor Selection
The voltage rating of the output capacitor must be greater
than the maximum output voltage with sufficient derat
-
ing. Because the ripple current in output capacitor is a
pulsating square wave in a boost circuit, it is important
that the ripple current rating of the output capacitor
be high enough to deal with this large ripple current.
Figure 6 shows the output ripple current in the 1- and
2-phase designs. As shown, the output ripple current of a
2-phase boost circuit reaches almost zero when the duty
cycle equals 50% or the output voltage is twice as much as
the input voltage. Thus the 2-phase technique significantly
reduces the output capacitor size.
Figure 6. Normalized Output RMS Ripple Currents in Boost
Converter: 1-Phase and 2-Phase. I
OUT
Is the DC Output Current.
0.1
I
ORIPPLE
/I
OUT
0.9
3782A F06
0.3
0.5
0.7
0.8
0.2
0.4
0.6
3.25
3.00
2.75
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
DUTY CYCLE OR (1-V
IN
/V
OUT
)
1-PHASE
2-PHASE
I
norm
=
V
IN
L f
s
The RMS Ripple Current is About 29% of
the Peak-to-Peak Ripple Current.
Figure 5. Normalized Input Peak-to-Peak Ripple Current
DUTY CYCLE
0
∆I
IN
/I
NORM
1.00
0.90
0.80
0.60
0.70
0.50
0.40
0.30
0.20
0.10
0
0.8
3782A F05
0.2
0.4
0.6
1.0
1-PHASE
2-PHASE
applicaTions inForMaTion

LT3782AIFE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 2-PhBoost DC/DC Cntr
Lifecycle:
New from this manufacturer.
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