ADuM5240/ADuM5241/ADuM5242 Data Sheet
Rev. B | Page 10 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
120
0
0 12
06014-005
I
ISO
OUTPUT LOAD CURRENT (mA)
I
DD
INPUT CURRENT (mA)
2 4 6 8 10
100
80
60
40
20
Figure 8. Typical I
DD
Input Current vs. I
ISO
Output Load Current
5.5
4.5
0 12
06014-006
I
ISO
OUTPUT LOAD CURRENT (mA)
V
ISO
OUTPUT VOLTAGE (V)
5.4
5.3
5.2
5.1
5.0
4.9
4.8
4.7
4.6
2 4 6 8 10
Figure 9. Typical Isolated V
ISO
Output Voltage vs. I
ISO
Output Load Current
100%
–50
0 35
06014-007
TIME (µs)
RESPONSE TO 90%-10%-90% LOAD PULSE (mV)
0
100
50
0
5 10 15 20 25 30
LOAD
Figure 10. Typical V
ISO
Transient Load Response, 5 V Output,
90% to 10% to 90% Pulsed Load, 100 nF Bypass Capacitance vs. Time
200
–200
0
100
06014-008
TIME (ns)
V
ISO
NOISE (mV)
150
100
50
0
–50
–100
–150
20 40 60 80
Figure 11. Typical Output Voltage Noise at 100% Load,
100 nF Bypass Capacitance vs. Time
Data Sheet ADuM5240/ADuM5241/ADuM5242
Rev. B | Page 11 of 16
APPLICATIONS INFORMATION
DC-TO-DC CONVERTER
The dc-to-dc converter section of the ADuM524x works on
principles that are common to most modern power supply
designs. V
DD
power is supplied to an oscillating circuit that
switches current into a chip scale air core transformer. Power is
transferred to the secondary side where it is rectified to a high
dc voltage. The power is then linearly regulated down to about
5.2 V and supplied to the secondary side data section and to the
V
ISO
pin for external use. This design allows for a physically
small power section compatible with the 8-lead SOIC packaging
of this device. Active feedback was not implemented in this
version of isoPower for reasons of size and cost.
Because the oscillator runs at a constant high frequency inde-
pendent of the load, excess power is internally dissipated in the
output voltage regulation process. Limited space for transformer
coils and components also adds to internal power dissipation.
This results in low power conversion efficiency, especially at low
load currents.
The load characteristic curve in Figure 8 shows that the V
DD
current is typically 80 mA with no V
ISO
load and 110 mA at full
V
ISO
load at the V
DD
supply pin.
Alternate supply architectures are possible using this technology.
Addition of a digital feedback path allows regulation of power
on the primary side. Feedback would allow significantly higher
power, efficiency, and synchronization of multiple supplies at the
expense of size and cost. Future implementations of isoPower
includes feedback to achieve these performance improvements.
The ADuM524x can be operated with the internal dc-to-dc
enabled or disabled. With the internal dc-to-dc converter
enabled, the isolated supply of Pin 8 provides the output power
as well as power to the secondary-side circuitry of the part.
The internal dc-to-dc converter state of the ADuM524x is
controlled by the input V
DD
voltage, as defined in Table 6. In
normal operating mode, V
DD
is set between 4.5 V and 5.5 V and
the internal dc-to-dc converter is enabled. When/if it is desired
to disable the dc-to-dc converter, V
DD
is lowered to a value
between 2.7 V and 4.0 V. In this mode, V
ISO
power is supplied
externally by the user and the signal channels of the ADuM524x
continue to operate normally.
There is hysteresis into the V
DD
input voltage detect circuit.
Once the dc-to-dc converter is active, the input voltage must be
decreased below the turn-on threshold to disable the converter.
This feature ensures that the converter does not go into
oscillation due to noisy input power.
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The propagation
delay to a logic low output may differ from the propagation
delay to a logic high.
INPUT (
V
Ix
)
OUTPUT (V
Ox
)
t
PLH
t
PHL
50%
50%
06014-012
Figure 12. Propagation Delay Parameters
Pulse width distortion is the maximum difference between
these two propagation delay values and is an indication of how
accurately the timing of the input signal is preserved.
Channel-to-channel matching refers to the maximum amount
the propagation delay differs between channels within a single
ADuM524x component.
Propagation delay skew refers to the maximum amount the
propagation delay differs between multiple ADuM524x
components operating under the same conditions.
DC CORRECTNESS AND MAGNETIC FIELD
IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions at the input for more than 1 μs, a periodic set
of refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses of more than about 5 μs, the input side is assumed
to be unpowered or nonfunctional, in which case the isolator
output is forced to a default state by the watchdog timer circuit
(see Table 12 through Table 14).
The limitation on the magnetic field immunity of the ADuM524x
is set by the condition in which induced voltage in the receiving
coil of the transformer is sufficiently large to either falsely set or
reset the decoder. The following analysis defines the conditions
under which this may occur. The 3 V operating condition of the
ADuM524x is examined because it represents the most susceptible
mode of operation.
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V, thus
establishing a 0.5 V margin in which induced voltages can be
tolerated. The voltage induced across the receiving coil is given by
V = (−dβ/dt)Σπr
n
2
; n = 1, 2, … , N
where:
β is magnetic flux density (gauss).
N is the number of turns in the receiving coil.
r
n
is the radius of the n
th
turn in the receiving coil (cm).
ADuM5240/ADuM5241/ADuM5242 Data Sheet
Rev. B | Page 12 of 16
Given the geometry of the receiving coil in the ADuM524x and
an imposed requirement that the induced voltage be at most
50% of the 0.5 V margin at the decoder, a maximum allowable
magnetic field is calculated, as shown in Figure 13.
MAGNETIC FIELD FREQUENCY (Hz)
100
MAXIMUM ALLOWABLE MAGNETIC FLUX
DENSITY (kgauss)
0.001
1M
10
0.01
1k 10k 10M
0.1
1
100M100k
06014-013
Figure 13. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event were to occur during a transmitted
pulse (and was of the worst-case polarity), it would reduce the
received pulse from >1.0 V to 0.75 Vstill well above the 0.5 V
sensing threshold of the decoder.
The preceding magnetic flux density values correspond to
specific current magnitudes at given distances from the
ADuM524x transformers. Figure 14 expresses these allowable
current magnitudes as a function of frequency for selected
distances. As shown in Figure 14, the ADuM524x is extremely
immune and can only be affected by extremely large currents
operated at high frequencies very close to the component. For
the 1 MHz example noted, one would have to place a 0.5 kA
current 5 mm away from the ADuM524x to affect the operation
of the component.
MAGNETIC FIELD FREQUENCY (Hz)
MAXIMUM ALLOWABLE CURRENT (kA)
1000
100
10
1
0.1
0.01
1k 10k 100M100k 1M 10M
DISTANCE = 5mm
DISTANCE = 1m
DISTANCE = 100mm
06014-014
Figure 14. Maximum Allowable Current
for Various Current-to-ADuM524x Spacings
Note that at combinations of strong magnetic field and high
frequency, any loops formed by printed circuit board (PCB)
traces could induce error voltages sufficiently large enough to
trigger the thresholds of succeeding circuitry. Care should be
taken in the layout of such traces to avoid this possibility.
THERMAL ANALYSIS
Each ADuM524x component consists of two internal die,
attached to a split-paddle lead frame. For the purposes of
thermal analysis, it is treated as a thermal unit with the highest
junction temperature reflected in the θ
JA
value in Table 2. The
value of θ
JA
is based on measurements taken with the part
mounted on a JEDEC standard 4-layer PCB with fine-width
traces in still air. Under normal operating conditions, the
ADuM524x operates at full load across the full temperature
range without derating the output current. For example, a part
with no external load drawing 80 mA and dissipating 400 mW
causes a 32°C temperature rise above ambient. It is normal for
these devices to run warm.
Following the recommendations in the PCB Layout section
decreases the thermal resistance to the PCB allowing increased
thermal margin at high ambient temperatures.
PCB LAYOUT
The ADuM524x requires no external circuitry for its logic
interfaces. Power supply bypassing is required at the input and
output supply pins (see Figure 15).
The power supply section of the ADuM524x uses a 300 MHz
oscillator frequency to pass power through its chip scale trans-
formers. In addition, the normal operation of the data section
of the iCoupler introduces switching transients, as described in
the DC Correctness and Magnetic Field Immunity section, on
the power supply pins (see Figure 11). Low inductance capacitors
are required to bypass noise generated at the switching frequency
as well as 1 ns pulses generated by the data transfer and dc refresh
circuitry. The total lead length between both ends of the capacitor
and the input power supply pin should not exceed 20 mm.
In cases where EMI emission is a concern, series inductance may
be added to critical power and ground traces. Discrete inductors
should be added to the line such that the high frequency bypass
capacitors are between the inductor and the ADuM524x device
pin. Inductance can be added in the form of discrete inductors
or ferrite beads added to both power and ground traces. The
recommended value corresponds to impedance between 50
and 100 Ω at approximately 300 MHz.
If the switching speed of the data outputs is causing unacceptable
EMI, capacitance to ground can be added at output pins to slow
the rise and fall time of the output. This slew rate limits the output.
Capacitance values depend on application speed requirements.
See the AN-0971 Application Note for board layout guidelines.

ADUM5241ARZ

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Digital Isolators Dual-CH w/ Intg DC/DC Converter
Lifecycle:
New from this manufacturer.
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