4.1. Pin Assignment
Pin Functions Pin
No
Primary Alternate Functions
Signal
Type
Description
1 ADC4 3.3V Analogue to Digital Input
2 DAC1 3.3V DAC Output
3 DAC2 3.3V DAC Output
4 COMP2+ 3.3V Comparator 2 Input +ve
5 COMP2- 3.3V Comparator 2 Input -ve
6 SPICLK CMOS SPI Clock Output
7 SPIMISO CMOS SPI Master In Slave Out Input
8 SPIMOSI CMOS SPI Master Out Slave In Output
9 SPISSZ CMSO SPI Select From Module – SS0
Output
10 DIO0 SPISEL1 CMOS DIO0 or SPI Slave Select Output 1
11 DIO1 SPISEL2 PC0 CMOS DIO1, SPI Slave Select Output 2
or Pulse Counter0 Input
12 DIO2* SPISEL3 RFRX CMOS DIO2, SPI Slave Select Output 3
or Radio Receive Control Output
13 SPISSM CMOS SPI Select to FLASH (Input)
14 SPISWP CMOS FLASH Write Protect (Input)
15 DIO3* SPISEL4 RFTX CMOS DIO3, SPI Slave Select Output 4
or Radio Transmit Control Output
16 DIO4 CTS0 JTAG_TCK CMOS DIO4, UART 0 Clear To Send
Input or JTAG CLK
17 DIO5 RTS0 JTAG_TMS CMOS DIO5, UART 0 Request To Send
Output or JTAG Mode Select
18 DIO6 TXD0 JTAG_TDO CMOS DIO6, UART 0 Transmit Data
Output or JTAG Data Output
19 DIO7 RXD0 JTAG_TDI CMOS DIO7, UART 0 Receive Data Input
or JTAG Data Input
20 DIO8 TIM0CK_GT PC1 CMOS DIO8, Timer0 Clock/Gate Input or
Pulse Counter1 Input
21 DIO9 TIM0CAP 32KXTALIN 32KIN CMOS DIO9, Timer0 Capture Input, 32K
External Crystal Input or 32K
Clock Input
22 DIO10 TIM0OUT 32KXTALOUT CMOS DIO10, Timer0 PWM Output or
32K External Crystal Output
23 DIO11 TIM1CK_GT TIM2OUT CMOS DIO11, Timer1 Clock/Gate Input or
Timer2 PWM Output
24 VDD 3.3V Supply Voltage
25 GND 0V Digital Ground
26 VSSA 0V Analogue Ground
27 DIO12 TIM1CAP ADO DAI_WS CMOS DIO12, Timer1 Capture Input,
Antenna Diversity or Digital Audio
Word Select
28 DIO13 TIM1OUT ADE DAI_SDIN CMOS DIO13, Timer1 PWM Output,
Antenna Diversity or Digital Audio
Data Input
29 RESETN CMOS Reset input
30 DIO14 SIF_CLK IP_CLK CMOS DIO14, Serial Interface Clock or
Intelligent Peripheral Clock Input
31 DIO15 SIF_D IP_DO CMOS DIO15, Serial Interface Data or
Intelligent Peripheral Data Out
32 DIO16 IP_DI
CMOS DIO16, Intelligent Peripheral Data
In
© NXP Laboratories UK 2010 JN-DS-JN5148-001-Myy 1v4 7
