LTM8022
6
8022fd
PIN FUNCTIONS
V
IN
(Bank 1): The V
IN
pin supplies current to the LTM8022’s
internal regulator and to the internal power switch. This
pin must be locally bypassed with an external, low ESR
capacitor of at least 2.2μF.
V
OUT
(Bank 2): Power Output Pins. Apply the output fi lter
capacitor and the output load between these pins and
GND pins.
AUX (Pin F5): Low current voltage source for BIAS. In
many designs, the BIAS pin is simply connected to V
OUT
.
The AUX pin is internally connected to V
OUT
and is placed
adjacent to the BIAS pin to ease printed circuit board
routing. Although this pin is internally connected to V
OUT
,
do NOT connect this pin to the load. If this pin is not tied
to BIAS, leave it fl oating. The Application Information
section gives specifi c information about the BIAS and
AUX connections
BIAS (Pin G5): The BIAS pin connects to the internal power
bus. Connect to a power source greater than 2.4V. If the
output is greater than 2.4V, connect this pin there. If the
output voltage is less, connect this to a voltage source
between 2.4V and 16V. Also, make sure that BIAS + V
IN
is less than 56V.
RUN/SS (Pin H5): Tie RUN/SS pin to ground to shut down
the LTM8022. Tie to 2.5V or more for normal operation.
If the shutdown feature is not used, tie this pin to the V
IN
pin. RUN/SS also provides a soft-start function; see the
Applications Information section.
GND (Bank 3): Tie these GND pins to a local ground plane
below the LTM8022 and the circuit components. Return
the feedback divider (R
ADJ
) to this pin.
R
T
(Pin G7): The R
T
pin is used to program the switching
frequency of the LTM8022 by connecting a resistor from
this pin to ground. The Applications Information section of
the data sheet includes a table to determine the resistance
value based on the desired switching frequency. Minimize
capacitance at this pin.
SHARE (Pin F7): Tie this to the SHARE pin of another
LTM8022 when paralleling the outputs. Otherwise, leave
this pin fl oating.
SYNC (Pin G6): External Clock Synchronization Input.
Ground this pin for low ripple Burst Mode
®
operation at
low output loads, or connect to a stable voltage source
above 0.7V to disable Burst Mode operation. Do not leave
this pin fl oating. Tie to a clock source for synchronization.
Clock edges should have rise and fall times faster than
1μs. See Synchronization in the Applications Information
section.
PG (Pin H6): Open Collector Output of an Internal
Comparator. PG remains low until the ADJ pin is within
10% of the fi nal regulation voltage. PG output is valid when
V
IN
is above 3.6V and RUN/SS is high. If this function is
not used, leave this pin fl oating.
ADJ (Pin H7): The LTM8022 regulates its ADJ pin to 0.79V.
Connect the adjust resistor from this pin to ground. The
value of R
ADJ
is given by the equation, R
ADJ
= 394.21/
(V
OUT
–0.79), where R
ADJ
is in kΩ.
