MGA-425P8-BLK Datasheet MGA-425P8-TR1, MGA-425P8-BLK, MGA-425P8-TR2 | P1-P3

MGA-425P8

GaAs Enchancement-mode PHEMT

Power Amplier in 2x2 mm

LPCC Package

Data Sheet

Description

Avago Technologies’s MGA-425P8 power amplier is designed

for wireless application in the 2–10 GHz frequency range. The

PA has a high power eciency (PAE) achieved through the

use of Avago Technologies’s proprietary GaAs Enhancement-

mode pHEMT process.

MGA-425P8 is housed in a miniature 2.0 x 2.0 x 0.75 mm 8-lead

leadless-plastic-chip-carrier (LPCC) package. The compact foot-

print, low prole couple with the excellent thermal eciency

of the LPCC package makes the MGA-425P8 an ideal choice as

power amplier that saves board space.

On-chip bias circuitry allows operation from a single +3.3V

power supply. The output of the amplier is near to 50Ω (be-

low 2:1 VSWR) around 4.9–5.8 GHz. This makes MGA-425P8 an

ideal choice as power amplier for broadband IEEE 802.11a

system as well as other high performance wireless application

in the 2–10 GHz frequency range.

One external resistor (RBias) is used to set the bias current of

the device over a wide range.

This allows the designer to use the same part in several circuit

positions and tailor the output power/linearity performance,

and current consumption, to suit each position.

Pin Connections and Package Marking

2.0 x 2.0 x 0.75 mm 8-lead LPCC

Features

• Near 50Ω broadband output match

• Single +3.3V supply

• High Gain & OIP3

• Miniature 2 x 2 x 0.75 mm

LPCC package

• Pb-free & MSL-1 package

• Tape-and-Reel packaging

option available

Specications @ 5.25 GHz, 3.3V, 58 mA (typ)

• 13.3 dBm Linear Pout @ 5% EVM

• 10.3% PAE @ +13.3 dBm Pout

• 12 dBm Linear Pout @ 3% EVM

• 7.6% PAE @ + 12 dBm Pout

• 47% PAE @ P1dB

• 20.3 dBm P1dB

• 32.9 dBm OIP3

• 16 dB Gain

• 1.7 dB NF

Note:

Package marking provides orientation and identication

“2Y” = Device Code

“X” = Data code indicates the month of manufacture.

Pin 1 (NC)

Pin 2 (RFin)

Pin 3 (NC)

Pin 4 (NC)

Pin 8 (NC)

Pin 7 (RFout, VD)

Pin 6 (NC)

Pin 5 (RBias)

2YX

Top View

Pin 1 (NC)

GND

Pin 2 (RFin)

Pin 3 (NC)

Pin 4 (NC)

Pin 8 (NC)

Pin 7 (RFout, VD)

Pin 6 (NC)

Pin 5 (RBias)

Bottom View

Note:

Use Die Attach Padded for electrical grounding and thermal dissipa-

tion

Simplied Schematic

Attention: Observe precautions for

handling electrostatic sensitive devices.

ESD Machine Model (Class A)

ESD Human Body Model (Class 1A)

Refer to Avago Application Note A004R:

Electrostatic Discharge Damage and Control.

1, 3, 4, 6, 8

bias

5 7

Bias

ds +

bias

(NC)

RFout, VD

RFin

MGA-425P8 Absolute Maximum Ratings

[1]

Absolute

Symbol Parameter Units Maximum

Drain – Supply Voltage

[2]

V 5

Drain Current

[2]

A 100

diss

Total Power Dissipation

[3]

W 0.5

max. RF Input Power dBm 13

Channel Temperature °C 150

STG

Storage Temperature °C -65 to 150

ch_b

Thermal Resistance

[4]

°C/W 34.2

Notes:

1. Operation of this device above any

one of these parameters may cause per-

manent damage.

2. Assuming DC quiescent conditions.

3. Board (package belly) temperature T

25°C. Derate 29 mW/°C for T

> 133

°C.

4. Channel-to-board thermal resistance mea-

sured using 150°C Liquid Crystal Measure-

ment method.

Product Consistency Distribution Charts at 5.25 GHz, 3.3V RBias = 680Ω

[5, 6]

Notes:

5. Distribution data sample size is 500

samples taken from 3 dierent wafers and

3 dierent lots. Future wafers allocated

to this product may have nominal values

anywhere between the upper and lower

limits.

6. Measurements are made on production

test board, which represents a trade-o

between optimal OIP3, P1dB, Gain and

VSWR. Circuit losses have been de-embed-

ded from actual measurements.

OIP3 (dBm)

Figure 1. OIP3;

LSL = 29 dBm, Nominal = 32.9 dBm.

35 37

150

120

Stdev = 0.9

-3 Std

GAIN (dB)

Figure 2. GAIN;

LSL = 14.5 dB, Nominal = 16 dB, USL= 17.5 dB.

14.8

15.3

15.8

16.3 16.8 17.3

180

150

120

Stdev = 0.28

-3 Std

+3 Std

P1dB (dBm)

Figure 4. P1dB;

LSL = 18.25 dBm, Nominal = 20.3 dBm.

18.3

19.3

20.3

21.3 22.3

240

200

160

120

Stdev = 0.46

-3 Std

PAE (%)

Figure 5. PAE;

LSL = 33.5 %, Nominal = 47 %.

49 54 59

180

150

120

Stdev =

-3 Std

IDS (mA)

Figure 3. IDS;

LSL = 51 mA, Nominal = 58 mA, USL = 65 mA.

5553

59 61 63 65

250

200

150

100

Stdev =

1.22

-3 Std

+3 Std

0.6 pF

1 pF

0.6 pF

1.5 pF

2.2 pF

3.3 nH

2.2 µF

2.7 nH

1000 pF

Vd= +3.3V

1, 3, 4, 6, 8

MGA-425P8

680 Ω

15 Ω

MGA-425P8 Electrical Specications

= 25°C, DC bias for RF parameter is Vds = 3.3V and R

bias

= 680Ω (unless specied otherwise)

Symbol Parameter and Test Condition Units Min. Typ. Max.

Device Current mA 51 58 65

G Gain

[1]

Freq=5.25 GHz dB 14.5 16 17.5

NF Noise Figure

[1]

Freq=5.25 GHz dB – 1.7 –

OIP3 Output 3

Order Intercpt Point

[1,2]

Freq=5.25 GHz dBm 29 32.9 –

P1dB Output 1dB Compressed

[1]

Freq=5.25 GHz dBm 18.25 20.3 –

PAE Power Added Eciency

[1]

Freq=5.25 GHz % 33.5 47 –

EVM Error Vector Magnitude

[3]

at Pout=13.3 dBm % – 5 –

EVM Error Vector Magnitude

[3]

at Pout=12 dBm % – 3 –

Notes:

1. Measurement obtained using production test board described in Figure 6 and PAE tested at P1dB condition.

2. 5.25GHz OIP3 test condition: F1 = 5.25 GHz, F2 = 5.255 GHz and Pin = -5 dBm per tone.

3. EVM test condition: 802.11a 64QAM/54 Mbps OFDM Modulation and Freq = 5.25 GHz.

Figure 6. Simplied schematic of 5.25 GHz production test board used for

Gain, NF, OIP3 , P1dB, PAE and EVM measurements. This circuit achieves a

trade-o between optimal OIP3, P1dB and VSWR. Circuit losses have been

de-embedded from actual measurements.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15

MGA-425P8-BLK

Mfr. #:

Buy MGA-425P8-BLK

Manufacturer:

Broadcom / Avago

Description:

RF Amplifier Amplifier RFIC GaAs

Lifecycle:

New from this manufacturer.

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MGA-425P8-BLK

MGA-425P8-BLK

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