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MC10H102FN

P1-P3P4-P4
Semiconductor Components Industries, LLC, 2016
August, 2016 − Rev. 8
1 Publication Order Number:
MC10H102/D
MC10H102
Quad 2‐Input NOR Gate
Description
The MC10H102 is a quad 2-input NOR gate. The MC10H102
provides one gate with OR/NOR outputs. This MECL 10H part is a
functional/pinout duplication of the standard MECL 10K family
part, with 100% improvement in propagation delay, and no increases
in power − supply current.
Features
• Propagation Delay, 1.0 ns Typical
• Power Dissipation 25 mW/Gate (same as MECL 10K)
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K Compatible
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
Figure 1. Logic Diagram
Figure 2. Pin Assignment
V
CC1
A
out
B
out
A
in
A
in
B
in
B
in
V
EE
V
CC2
D
out
C
out
D
in
D
IN
C
in
C
in
D
out
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
V
CC1
= Pin 1
V
CC2
= Pin 16
V
EE
= Pin 8
14
13
12
11
10
3
7
6
2
5
4
15
9
Pin assignment is for Dual-in-Line Package.
MARKING DIAGRAMS*
PDIP−16
P SUFFIX
CASE 648−08
www.onsemi.com
16
1
6
1
MC10H102P
AWLYYWWG
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G = Pb-Fee Package
PLLC−20
FN SUFFIX
CASE 775−02
20
1
10H102G
AWLYYWW
120
*For additional marking information, refer to
Application Note AND8002/D
.
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D
.
ORDERING INFORMATION
Device Package Shipping
†
MC10H102FNR2G PLCC−20
(Pb-Free)
500/Tape & Reel
MC10H102PG PDIP−16
(Pb-Free)
25 Units/Tube
MC10H102
www.onsemi.com
2
Table 1. MAXIMUM RATINGS
Symbol Characteristic Rating Unit
V
EE
Power Supply (V
CC
= 0) −8.0 to 0 Vdc
V
I
Input Voltage (V
CC
= 0) 0 to V
EE
Vdc
I
out
Output Current
Continuous
Surge
50
100
mA
T
A
Operating Temperature Range 0 to +75 °C
T
stg
Storage Temperature Range
Plastic
Ceramic
−55 to +150
−55 to +165
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 2. ELECTRICAL CHARACTERISTICS (V
EE
= −5.2 V ±5%) (Note 1)
0° 25° 75°
Symbol Characteristic Min Max Min Max Min Max Unit
I
E
Power Supply Current − 29 − 26 − 29 mA
I
inH
Input Current High − 425 − 265 − 265
mA
I
inL
Input Current Low 0.5 − 0.5 − 0.3 −
mA
V
OH
High Output Voltage −1.02 −0.84 −0.98 −0.81 −0.92 −0.735 Vdc
V
OL
Low Output Voltage −1.95 −1.63 −1.95 −1.63 −1.95 −1.60 Vdc
V
IH
High Input Voltage −1.17 −0.84 −1.13 −0.81 −1.07 −0.735 Vdc
V
IL
Low Input Voltage −1.95 −1.48 −1.95 −1.48 −1.95 −1.45 Vdc
1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained.
Outputs are terminated through a 50 W resistor to −2.0 V.
Table 3. AC CHARACTERISTICS
0° 25° 75°
Symbol Characteristic Min Max Min Max Min Max Unit
t
pd
Propagation Delay 0.4 1.25 0.4 1.25 0.4 1.4 ns
t
r
Rise Time 0.5 1.5 0.5 1.6 0.55 1.7 ns
t
f
Fall Time 0.5 1.5 0.5 1.6 0.55 1.7 ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
MC10H102
www.onsemi.com
3
PACKAGE DIMENSIONS
20 LEAD PLLC
CASE 775−02
ISSUE F
−M−
−N−
−L−
Y BRK
W
V
D
D
S
L-M
M
0.007 (0.180) N
S
T
S
L-M
M
0.007 (0.180) N
S
T
S
L-M
S
0.010 (0.250) N
S
T
X
G1
B
U
Z
VIEW D−D
20 1
S
L-M
M
0.007 (0.180) N
S
T
S
L-M
M
0.007 (0.180) N
S
T
S
L-M
S
0.010 (0.250) N
S
T
C
G
VIEW S
E
J
R
Z
A
0.004 (0.100)
−T−
SEATING
PLANE
S
L-M
M
0.007 (0.180) N
S
T
S
L-M
M
0.007 (0.180) N
S
T
H
VIEW S
K
K1
F
G1
NOTES:
1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M,
1982.
2. DIMENSIONS IN INCHES.
3. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP
OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD
PARTING LINE.
4. DIMENSION G1, TRUE POSITION TO BE MEASURED AT
DATUM −T−, SEATING PLANE.
5. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH.
ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE.
6. DIMENSIONS IN THE PACKAGE TOP MAY BE SMALLER
THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE
BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY
MISMATCH BETWEEN THE TOP AND BOTTOM OF THE
PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION
TO BE GREATER THAN 0.037 (0.940). THE DAMBAR
INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO
BE SMALLER THAN 0.025 (0.635).
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 0.385 0.395 9.78 10.03
B 0.385 0.395 9.78 10.03
C 0.165 0.180 4.20 4.57
E 0.090 0.110 2.29 2.79
F 0.013 0.021 0.33 0.53
G 0.050 BSC 1.27 BSC
H 0.026 0.032 0.66 0.81
J 0.020 −−− 0.51 −−−
K 0.025 −−− 0.64 −−−
R 0.350 0.356 8.89 9.04
U 0.350 0.356 8.89 9.04
V 0.042 0.048 1.07 1.21
W 0.042 0.048 1.07 1.21
X 0.042 0.056 1.07 1.42
Y −−− 0.020 −−− 0.50
Z 2 10 2 10
G1 0.310 0.330 7.88 8.38
K1 0.040 −−− 1.02 −−−
____
P1-P3P4-P4

MC10H102FN

Mfr. #:
Buy MC10H102FN
Manufacturer:
ON Semiconductor
Description:
Logic Gates Quad 2-Input NOR
Lifecycle:
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