MAX2264/MAX2265/MAX2266
2.7V, Single-Supply, Cellular-Band
Linear Power Amplifiers
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Detailed Description
The MAX2264/MAX2265/MAX2266 are linear power
amplifiers (PAs) intended for CDMA and TDMA appli-
cations. The devices have been fully characterized in
the 824MHz to 849MHz U.S. cellular band and can be
used from 750MHz to 1000MHz by adjusting the input
and output match. In CDMA applications, they provide
typically 28dBm of output power and up to 37% power-
added efficiency (PAE) from a single +2.7V to +5V sup-
ply. In TDMA applications, efficiency is 42% at 30dBm
of output power.
An inherent drawback of traditional PAs is that their effi-
ciency drops rapidly with reduced output power. For
example, in a PA designed for maximum efficiency at
+28dBm, the efficiency at +15dBm falls well below
4.5% (over 210mA from a +3.3V supply). This behavior
significantly reduces talk time in CDMA phones
because over 90% of the time they are at output pow-
ers below +16dBm. The MAX2264/MAX2265/MAX2266
are optimized for lowest current draw at output powers
that are most likely to occur in real-life situations. This
provides up to 50% reduced average PA current.
High-Power and Low-Power Modes
The MAX2264/MAX2266 are designed to provide opti-
mum PAE in both high- and low-power modes. For a
+3.3V supply, maximum output power is +28dBm in
high-power mode and +16dBm in low-power mode.
Use the system’s microcontroller to determine required
output power, and switch between the two modes as
appropriate with the PWR logic pin.
Bias Control
The bias current of the first stage in low-power mode is
proportional to the current flowing out of BIAS1L. The
voltage at BIAS1L is fixed by an internal bandgap refer-
Pin Description
IN0 RF Input Port. Requires external matching network.—16
BIAS1L
OUT0
NFP
GND
BIAS2H
BIAS1H
SHDN
BIAS2L
OUT1
V
CC
PWR
IN1
NAME
Low-Power Mode First Stage Bias Control. See General Description.—10
RF Output Port. Requires an appropriate output matching network and collector
bias.
—11
Noise Filtering Pin. Connect noise filtering network as described in
Noise Filtering section. If unused, leave open.
1212
Ground. Solder the package slug to high-thermal-conductivity circuit board
ground plane.
13, Slug13, Slug
High-Power Mode Second Stage Bias Control. See General Description.1515
High-Power Mode First Stage Bias Control. See General Description.44
Shutdown Control Input. Drive SHDN low to enable shutdown. Drive high for normal
operation. On the MAX2265, make sure that both pins get driven simultaneously.
To place the MAX2264/MAX2266 into shutdown mode, also pull the PWR pin low.
2, 66
Low-Power Mode Second Stage Bias Control. See General Description.—7
RF Output Ports. Require an appropriate output matching network and collector
bias.
8, 98, 9
Voltage Supply. Bypass with capacitors connected between this pin and GND.3, 53, 5, 14
Mode-Select Input. Drive low to select the low-power mode (BIAS1L and
BIAS2L). Drive high to select high-power mode (BIAS1H and BIAS2H).
—2
PIN
RF Input Port. Requires external matching network.11
MAX2265
MAX2264
MAX2266
FUNCTION
N.C. Not Internally Connected. Do not make any connections to these pins.
7, 10, 11,
14, 16
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