DS1050U-025+ Datasheet DS1050U-025+, DS1050Z-010+, DS1050U-001+ | P4-P6

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The master device generates all serial clock pulses and the START and STOP conditions. A transfer is

ended with a STOP condition or with a repeated START condition. Since a repeated START condition is

also the beginning of the next serial transfer, the bus will not be released.

The DS1050 may operate in the following two modes:

1. Slave receiver mode: Serial data and clock are received through SDA and SCL, respectively. After

each byte is received, an acknowledge bit is transmitted. START and STOP conditions are recognized

as the beginning and end of a serial transfer. Address recognition is performed by hardware after

reception of the slave (device) address and direction bit.

2. Slave transmitter mode: The first byte is received and handled as in the slave receiver mode.

However, in this mode the direction bit will indicate that the transfer direction is reversed. Serial data

is transmitted on SDA by the DS1050 while the serial clock is input on SCL. START and STOP

conditions are recognized as the beginning and end of a serial transfer.

SLAVE ADDRESS

A command/control byte is the first byte received following the START condition from the master

device. The command/control byte consists of a four-bit control code. For the DS1050, this is set as 0101

binary for read/write operations. The next three bits of the command/control byte are the device select

bits or slave address (A2, A1, A0). They are used by the master device to select which of eight possible

devices is to be accessed. When reading or writing the DS1050, the device select bits must match the

device select pins (A2, A1, A0). The last bit of the command/control byte (R/W) defines the operation to

be performed. When set to a one a read operation is selected, and when set to a zero a write operation is

selected. The command control byte is presented in Figure 3.

Following the START condition, the DS1050 monitors the SDA bus checking the device type identifier

being transmitted. Upon receiving the 0101 control code, the appropriate device address bits, and the

read/write bit, the slave device outputs an “acknowledge” signal on the SDA line.

COMMAND AND PROTOCOL

The command and protocol structure of the DS1050 allows the user to read or write the PWM

configuration register or place the device in a low-current state (shut-down mode) and recall the device

from a low-current state. Additionally, the 2-wire command/protocol structure of the DS1050 will support

eight different devices that can be uniquely controlled.

Figure 4a, b, c, d, & e show the five different command and protocol bytes for the DS1050. These include

the following command operations: 1) Set PWM duty cycle, 2) Set PWM duty cycle 100%, 3) Set

shutdown mode, 4) Set recall mode, 5) Read PWM configuration register.

The command operation “Set PWM Duty Cycle” is used to configure the output duty cycle of the device.

The DS1050 has a 5-bit resolution and is capable of setting the duty cycle output from 0% up to 96.88%

in steps of 3.125%. A binary value of (00000B) sets the duty cycle output at 0% while a binary value of

(11111B) sets the duty cycle output at 96.88%.

The command operation “Set PWM Duty Cycle 100%” is used to configure the output duty cycle of the

device to a “full-on.” This command is provided in addition to the Set PWM Duty Cycle command for

flexibility and convenience in total duty cycle coverage. It allows the user to provide a total duty cycle

range from 0% to 100%.

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The command operation “Set Shutdown Mode” is used to provide a low-current (inactive state) state for

the DS1050. When in a low-current state the DS1050 will draw currents less than or equal to 1mA. The

PWM

output will be high impedance.

The command operation “Set Recall Mode” is used to recall the DS1050 from a low-current state. The

value of the PWM

output is recalled to that prior to initiating a “Set shutdown mode” command.

The “Read PWM Duty Cycle” command is used to read the current setting of the PWM configuration

is in a shutdown configuration.

PWM data values and control/command values are always transmitted most significant bit (MSB) first.

During communications, the receiving unit always generates the “acknowledge.”

READING THE DS1050

As shown in Figure 4e, the DS1050 provides one read command operation. This operation allows the

user to read the current setting of the PWM configuration register. Specifically, the R/W bit of the

command/control byte is set equal to a 1 for a read operation. Communication to read the DS1050 begins

with a START condition which is issued by the master device. The command/control byte from the

master device will follow the START condition. Once the command/control byte has been received by

the DS1050, the part will respond with an ACKNOWLEDGE. The read/write bit of the command/control

byte, as stated, should be set equal to 1 for reading the DS1050.

When the master has received the ACKNOWLEDGE from the DS1050, the master can then begin to

receive the PWM configuration register data. As mentioned this data will be transmitted MSB first. Once

the eight bits of the PWM configuration register have been transmitted, the master will need to issue an

ACKNOWLEDGE, unless it is the only byte to be read, in which case the master issues a NOT

ACKNOWLEDGE. If desired the master may stop the communication transfer at this point by issuing the

STOP condition. Final communication transfer is terminated by issuing the STOP command. Again, the

flow of the read operation is presented in Figure 4e.

WRITING THE DS1050

A data flow diagram for writing the DS1050 is shown in Figures 4a, b, c, and d. The DS1050 has three

write commands that are used to change the PWM configuration register or the shutdown and recall mode

of the device.

All the write operations begin with a START condition. Following the START condition, the master

device will issue the command/control byte. The read/write bit of the command/control byte will be set to

“0” for writing the DS1050. Once the command/control byte has been issued and the master receives the

acknowledgment from the DS1050, PWM configuration data is transmitted to the DS1050 by the master

device.

A data byte for the DS1050 will contain PWM configuration data and shutdown/recall command data.

The five least significant bits of data specify the PWM configuration value while the three most

significant bits specify the whether the device is to be shutdown or recalled. When the DS1050 has

received the data byte, it will respond with an ACKNOWLEDGE. At this point, the new PWM

configuration register value and shutdown/recall command value will be updated in the DS1050. The

master device, after the receipt of the ACKNOWLEDGE, can continue to transmit additional data bytes

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or if the transaction is complete respond with the STOP condition. The 2-wire serial timing diagram is

presented in Figure 5.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P17

DS1050U-025+

Mfr. #:

Buy DS1050U-025+

Manufacturer:

Maxim Integrated

Description:

Clock Generators & Support Products 5 Bit 118-mil 2-Wire 25kHz PWM

Lifecycle:

New from this manufacturer.

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DS1050U-025+

DS1050U-025+

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