NCP439FCT2G

© Semiconductor Components Industries, LLC, 2013
August, 2016 − Rev. 1
1 Publication Order Number:
NCP439/D
NCP439
2A Very Low Ron Switches
at Low Vin Voltage
The NCP439 is a very low Ron MOSFET controlled by external
logic pin, allowing optimization of battery life, and portable device
autonomy.
This load switch is a best in class in term of R
DS(on)
optimization at
low V
IN
voltage.
Due to a current consumption optimization with PMOS structure,
leakage currents are eliminated by isolating connected IC’s on the
battery when not used.
Output discharge path is also embedded to eliminate residual
voltages on the output.
Proposed in wide input voltage range from 1.0 V to 3.6 V, and a very
small 0.96 x 0.96 mm WLCSP4, 0.5 mm pitch.
Features
1 V – 3.6 V Operating Range
37 mW P MOSFET at 1.8 V
DC Current Up to 2 A
Output Auto−Discharge
Active High EN Pin
WLCSP4 0.96 x 0.96 mm
This is a Pb−Free Device
Typical Applications
Mobile Phones
Tablets
Digital Cameras
GPS
Portable Devices
ENx
0
EN
DCDC Converter
IC’n
or
LDO
OUT
A1
GND
B1
IN
A2
EN
B2
Figure 1. Typical Application Circuit
MARKING
DIAGRAM
www.
onsemi.com
See detailed ordering and shipping information on page 8 o
f
this data sheet.
ORDERING INFORMATION
OUT
GND
IN
EN
12
A
B
(Top View)
PIN DIAGRAM
WLCSP4
CASE 567FG
1
AY = Specific Device Code
A = Assembly Location
Y = Year
W = Wafer Lot
AY
AYW
NCP439
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2
PIN FUNCTION DESCRIPTION
Pin Name Pin Number Type Description
IN A2 POWER
Load−switch input voltage; connect a 0.1 mF or greater ceramic capacitor from IN to GND as
close as possible to the IC.
GND B1 POWER Ground connection.
EN B2 INPUT Enable input, logic high turns on power switch.
OUT A1 OUTPUT
Load−switch output; connect a 0.1 mF ceramic capacitor from OUT to GND as close as pos-
sible to the IC is recommended.
BLOCK DIAGRAM
Figure 2. Block Diagram
EN block
Control
logic
Gate driver and soft
start control
IN: Pin A2
EN: Pin B2
OUT: Pin A1
GND: Pin B1
NCP439
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3
MAXIMUM RATINGS
Symbol Rating Value Unit
V
EN,
V
IN,
V
OUT
IN, OUT, EN, Pins −0.3 to + 4.0 V
V
IN,
V
OUT
From IN to OUT Pins: Input/Output 0 to + 4.0 V
ESD HBM Human Body Model (HBM) ESD Rating are (Notes 1 and 2) 2500 V
ESD MM Machine Model (MM) ESD Rating are (Notes 1 and 2) 250 V
ESD CDM Charge Device Model (CDM) ESD Rating are (Notes 1 and 2) 2000 V
LU Latch−up protection (Note 3)
− Pins IN, OUT, EN
100 mA
T
J
Maximum Junction Temperature −40 to + 125 °C
T
STG
Storage Temperature Range −40 to + 150 °C
MSL Moisture Sensitivity (Note 4) Level 1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. According to JEDEC standard JESD22−A108.
2. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM) ±2.5 kV per JEDEC standard: JESD22−A114 for all pins.
Machine Model (MM) ±250 V per JEDEC standard: JESD22−A115 for all pins.
Charge Device Model (CDM) ±2.0 kV per JEDEC standard: JESD22−C101 for all pins.
3. Latch up Current Maximum Rating: ±100 mA per JEDEC standard: JESD78 class II.
4. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020.
OPERATING CONDITIONS
Symbol Parameter Conditions Min Typ Max Unit
V
IN
Operational Power Supply 1.0 3.6 V
V
EN
Enable Voltage 0 3.6
T
A
Ambient Temperature Range −40 25 + 85 °C
C
IN
Decoupling input capacitor 0.1
mF
C
OUT
Decoupling output capacitor 0.1
mF
R
q
JA
Thermal Resistance Junction to Air WLCSP package (Note 5) 100 °C/W
I
OUT
Maximum DC current 2 A
P
D
Power Dissipation Rating (Note 6)
T
A
25°C WLCSP package 0.5
W
T
A
= 85°C WLCSP package 0.2
5. The R
q
JA
is dependent of the PCB heat dissipation and thermal via.
6. The maximum power dissipation (P
D
) is given by the following formula:
P
D
+
T
JMAX
* T
A
R
qJA

NCP439FCT2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Power Switch ICs - Power Distribution 2A LOAD SWITCH
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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