LTC1261
4
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For more information www.linear.com/LTC1261
TYPICAL PERFORMANCE CHARACTERISTICS
TEST CIRCUITS
Maximum Output Current
vs Supply Voltage
Supply Current
vs Supply Voltage
Supply Current
vs Temperature
Output Voltage
vs Output Current
Output Voltage (Doubler Mode)
vs Supply Voltage
Output Voltage (Tripler Mode)
vs Supply Voltage
(See Test Circuits)
OUTPUT CURRENT (mA)
0
OUTPUT VOLTAGE (V)
3.9
3.7
3.5
3.6
3.8
4.0
4.2
4.4
8
LT1261 • TP01
4.1
4.3
4.5
21 3 5 7 9
4
6
10
V
CC
= 5V
DOUBLER MODE
V
CC
= 3.3V
TRIPLER MODE
T
A
= 25°C
SUPPLY VOLTAGE (V)
5.0
OUTPUT VOLTAGE (V)
3.9
3.7
3.5
3.6
3.8
4.0
4.2
4.4
6.6
LT1261 • TP02
4.1
4.3
4.5
5.45.2 5.6 6.0 6.4 6.8
5.8
6.2
7.0
T
A
= 85°C
T
A
= 25°C
T
A
= –40°C
SUPPLY VOLTAGE (V)
3
4.5
4.4
4.3
4.2
4.1
4.0
3.9
3.8
3.7
3.6
3.5
OUTPUT VOLTAGE (V)
4
5
LTC1261 • TPC03
6
7
T
A
= 85°C
T
A
= 25°C
T
A
= –40°C
SUPPLY VOLTAGE (V)
3.0
10
MAXIMUM OUTPUT CURRENT (mA)
20
30
40
50
3.5 4.0 4.5 5.0
LTC1261 • TPC04
5.5 6.0 6.5 7.0
V
OUT
= –4V ±5%
T
A
= 25°C
TRIPLER MODE
DOUBLER MODE
SUPPLY VOLTAGE (V)
500
1000
600
800
SUPPLY CURRENT (µA)
700
900
1200
3.5 4.5 5.5 6.5
LTC1261 • TPC05
7.5 8.03.0 4.0 5.0 6.0 7.0
V
OUT
= –4V
T
A
= 25°C
TRIPLER MODE
DOUBLER MODE
TEMPERATURE (°C)
40
SUPPLY CURRENT (µA)
900
1000
1200
20 60
LTC1261 • TPC06
800
700
–20 0
40 80 100
600
500
V
OUT
= –4V
V
CC
= 5V
DOUBLER MODE
V
CC
= 3.3V
TRIPLER MODE
1
2
3
4
8
7
6
5
LTC1261-4
SHDN
REG
OUT
COMP
V
CC
C1
+
C1
GND
0.1µF
LTC1261 • TCO1
3.3µF
V
OUT
= –4V ±5%
5V
10µF
+
+
2
3
4
5
10
9
8
7
11
ADJ
R
ADJ
R1
R0
OUT
C1
+
C1
C2
+
C2
0.1µF
LTC1261 • TC02
6
14
0.1µF
10µF
LTC1261CS
V
IN
= 3.3V
V
CC
GND
3.3µF
V
OUT
= –4V ±5%
+
+
Doubler Mode
Tripler Mode
LTC1261
5
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For more information www.linear.com/LTC1261
PIN FUNCTIONS
NC (Pin 1/NA): No Internal Connection.
C1
+
(Pin 2/Pin 2): C1 Positive Input. Connect a 0.1µF
capacitor between C1
+
and C1
. With the LTC1261CS in
doubler mode, connect a 0.1µF capacitor from C1
+
to C2
.
C1
(Pin 3/Pin 3): C1 Negative Input. Connect a 0.1µF
capacitor from C1
+
to C1
. With the LTC1261CS in doubler
mode only, C1
should float.
C2
+
(Pin 4/NA): C2 Positive Input. In tripler mode connect
a 0.1µF capacitor from C2
+
to C2
. This pin is used with
the LTC1261CS in tripler mode only; in doubler mode this
pin should float.
C2
(Pin 5/NA): C2 Negative Input. In tripler mode con-
nect a 0.1µF capacitor from C2
+
to C2
. In doubler mode
connect a 0.1µF capacitor from C1
+
to C2
.
GND (Pin 6/Pin 4): Ground. Connect to a low impedance
ground. A ground plane will help to minimize regulation
errors.
R0 (Pin 7/NA): Internal Resistor String, 1st Tap. See Table2
in the Applications Information section for information on
internal resistor string pin connections vs output voltage.
R1 (Pin 8/NA): Internal Resistor String, 2nd Tap
.
R
ADJ
(Pin 9/NA): Internal Resistor String Output. Connect
this pin to ADJ to use the internal resistor divider. See Table
2 in the Applications Information section for information on
internal resistor string pin connections vs output voltage.
ADJ (COMP for Fixed Versions) (Pin 10/Pin 5): Output
Adjust/Compensation Pin. For adjustable parts this pin is
used to set the output voltage. The output voltage should
be divided
down with a resistor divider and fed back to
this pin to set the regulated output voltage. The resistor
divider can be external or the internal divider string can be
used if it can provide the required output voltage. Typically
(CS/CS8)
the resistor string should draw ≥10µA from the output to
minimize errors due to the bias current at the adjust pin.
Fixed output parts
have the internal resistor string con-
nected to this pin inside the package. The pin can be used
to trim the output voltage if desired. It can also be used as
an optional feedback compensation pin to reduce output
ripple on both adjustable and fixed output voltage parts.
See Applications Information section for more information
on compensation and output ripple.
OUT (Pin 11/Pin 6): Negative Voltage Output. This
pin
must be bypassed to ground with aF or larger capaci-
tor; it must be at least 3.3µF to provide specified output
ripple. The size of the output capacitor has a strong effect
on output ripple. See the Applications Information section
for more details.
REG (Pin 12/Pin 7): This is an open drain output that
pulls low when the output voltage is within 5% of the set
value. It will sink 8mA to ground with a 5V supply. The
external circuitry must provide a pull-up or REG will not
swing high. The voltage at REG may exceed V
CC
and can
be pulled up to 12V above ground without damage.
SHDN (Pin 13/Pin 8): Shutdown. When this pin is at ground
the LTC1261 operates normally. An internalA pull-down
keeps SHDN low if
it is left floating. When SHDN is pulled
high, the LTC1261 enters shutdown mode. In shutdown
the charge pump stops, the output collapses to 0V and
the quiescent current drops to 5µA typically.
V
CC
(Pin 14/Pin 1): Power Supply. This requires an input
voltage between 3V and 6.5V. Certain combinations of
output voltage and operating mode may place additional
restrictions on the input voltage. V
CC
must be bypassed
to ground with at least a 0.1µF capacitor placed in close
proximity to the chip. See the Applications Information
section for details.
LTC1261
6
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For more information www.linear.com/LTC1261
APPLICATIONS INFORMATION
MODES OF OPERATION
The LTC1261 uses a charge pump to generate a nega-
tive output voltage that can be regulated to a value either
higher or lower than the original input voltage. It has two
modes of operation: adoubler” inverting mode, which
can provide a negative output equal to or less than the
positive power supply and atripler” inverting mode,
which can provide
negative output voltages either larger
or smaller in magnitude than the original positive supply.
The tripler offers greater versatility and wider input range
but requires four external capacitors and a 14-lead pack-
age. The doubler offers the SO-8 package and requires
only three external capacitors.
Doubler Mode
Doubler mode allows the LTC1261 to generate negative
output voltage magnitudes up to that of the supply volt-
age, creating
a voltage between V
CC
and OUT of up to two
times V
S
. In doubler mode the LT1261 uses a single flying
capacitor to invert the input supply voltage, and the output
voltage is stored on the output bypass capacitor between
switch cycles. The LTC1261CS8 is always configured in
doubler mode and has only one pair of flying capacitor
pins (Figure 1a). The LTC1261CS
can be configured in
doubler mode by connecting a single flying capacitor
between the C1
+
and C2
pins. C1
and C2
+
should be
left floating (Figure 1b).
Tripler Mode
The LTC1261CS can be used in a tripler mode which can
generate negative output voltages up to twice the supply
voltage. The total voltage between the V
CC
and OUT pins
can be up
to three times V
S
. For example, tripler mode
can be used to generate – 5V from a single positive 3.3V
supply. Tripler mode requires two external flying capacitors.
The first connects between C1
+
and C1
and the second
between C2
+
and C2
(Figure 1c). Because of the relatively
high voltages that can be generated in this mode, care must
be taken to ensure
that the total input-to-output voltage
never exceeds 12V or the LTC1261 may be damaged. In
most applications the output voltage will be kept in check
by the regulation loop. Damage is possible however, with
supply voltages above 4V in tripler mode and above 6V
in doubler mode. As the input supply voltage rises the
allowable output voltage drops, finally reaching 4V with
an 8.5
V supply. To avoid this problem use doubler mode
whenever possible with high input supply voltages.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
C1
C2
C1
+
C1
C2
+
LTC1261
LTC1261 • F01
C2
1
2
3
4
5
6
7
14
13
12
11
10
9
8
C1
C1
+
C1
C2
+
LTC1261
C2
1
2
3
4
8
7
6
5
C1
+
C1
C1 LTC1261
a.) LTC1261CS8
DOUBLER MODE
b.) LTC1261CS
DOUBLER MODE
c.) LTC1261CS
TRIPLER MODE
Figure 1. Flying Capacitor Connections
THEORY OF OPERATION
A block diagram of the LTC1261 is shown in Figure 2. The
heart of the LTC1261 is the charge pump core shown in the
dashed box. It generates a negative output voltage by first
charging the flying capacitors between V
CC
and ground.
It then stacks the flying capacitors on top of each other
and connects the top of the stack to
ground forcing the
bottom of the stack to a negative voltage. The charge on
the flying capacitors is transferred to the output bypass
capacitor, leaving it charged to the negative output voltage.
This process is driven by the internal clock.
Figure 2 shows the charge pump configured in tripler mode.
With the clock low, C1 and C2 are charged to V
CC
by S1,
S3, S5 and S7.
At the next rising clock edge, S1, S3, S5
and S7 open and S2, S4 and S6 close, stacking C1 and
C2 on top of each other. S2 connects C1
+
to ground, S4
connects C1
to C2
+
and C2
is connected to the output
by S6. The charge in C1 and C2 is transferred to C
OUT
,
setting it to a negative voltage. Doubler
mode works the
same way except that the single flying capacitor (C1) is
connected between C1
+
and C2
. S3, S4 and S5 don’t do
anything useful in doubler mode. C1 is charged initially
by S1 and S7 and connected to the output by S2 and S6.

LTC1261CS8#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Adj Sw Cap Reg Volt Inverter
Lifecycle:
New from this manufacturer.
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