74AC175, 74ACT175 Quad D-Type Flip-Flop
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC175, 74ACT175 Rev. 1.4 7
AC Electrical Characteristics for ACT
Note:
8. Voltage Range 5.0 is 5.0V ± 0.5V.
AC Operating Requirements for ACT
Note:
9. Voltage Range 5.0 is 5.0V ± 0.5V.
Capacitance
Symbol
Parameter V
CC
(V)
(8)
T
A
= +25°C,
C
L
= 50pF
T
A
= –40°C to +85°C,
C
L
= 50pF
UnitsMin. Typ. Max. Min. Max.
f
MAX
Maximum Clock
Frequency
5.0 175 236 145 MHz
t
PLH
Propagation Delay,
CP to Q
n
or Q
n
5.0 2.0 6.0 10.0 1.5 11.0 ns
t
PHL
Propagation Delay,
CP to Q
n
or Q
n
5.0 2.0 7.0 11.0 1.5 12.0 ns
t
PLH
Propagation Delay,
MR
to Q
n
5.0 2.0 6.0 9.5 1.5 10.5 ns
t
PHL
Propagation Delay,
MR
to Q
n
5.0 2.0 5.5 9.5 1.5 10.5 ns
Symbol Parameter V
CC
(V)
(9)
T
A
= +25°C,
T
A
= –40°C to +85°C,
C
L
= 50pF
Units
C
L
= 50pF
Typ. Guaranteed Minimum
t
S
(H) Setup Time, D
n
to CP 5.0 3.0 2.0 2.0 ns
t
S
(L) 3.0 2.5 2.5
t
H
Hold Time, HIGH or LOW,
D
n
to CP
5.0 0 1.0 1.0 ns
t
W
CP Pulse Width,HIGH or LOW 5.0 4.0 3.0 3.5 ns
t
W
MR Pulse Width, LOW 5.0 4.0 3.0 4.0 ns
t
rec
Recovery Time, MR to CP 5.0 0 0 0 ns
Symbol Parameter Conditions Typ. Units
C
IN
Input Capacitance V
CC
= OPEN 4.5 pF
C
PD
Power Dissipation Capacitance V
CC
= 5.0V 45.0 pF
74AC175, 74ACT175 Quad D-Type Flip-Flop
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC175, 74ACT175 Rev. 1.4 8
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 2. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
74AC175, 74ACT175 Quad D-Type Flip-Flop
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC175, 74ACT175 Rev. 1.4 9
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 3. 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D

74ACT175SJ

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
Flip Flops Qd D-Type Flip-Flop
Lifecycle:
New from this manufacturer.
Delivery:
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