ZL30101 Data Sheet
List of Figures
4
Zarlink Semiconductor Inc.
Figure 1 - Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2 - Pin Connections (64 pin TQFP, please see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3 - Reference Monitor Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 4 - Behaviour of the Dis/Requalify Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5 - Out-of-Range Thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6 - Timing Diagram of Hitless Reference Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7 - Timing Diagram of Hitless Mode Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8 - DPLL Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 9 - Mode Switching in Normal Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 10 - Reference Switching in Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 11 - Clock Oscillator Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 12 - Crystal Oscillator Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 13 - Power-Up Reset Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 14 - Timing Parameter Measurement Voltage Levels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 15 - Input to Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 16 - Output Timing Referenced to F8/F32o . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
ZL30101 Data Sheet
5
Zarlink Semiconductor Inc.
1.0 Change Summary
Changes from February 2006 Issue to April 2010 Issue. Page, section, figure and table numbers refer to this
current issue.
Changes from November 2005 Issue to February 2006 Issue. Page, section, figure and table numbers refer to this
current issue.
Changes from July 2005 Issue to November 2005 Issue. Page, section, figure and table numbers refer to this
current issue.
Changes from October 2004 Issue to July 2005 Issue. Page, section, figure and table numbers refer to this current
issue.
Page Item Change
1 Ordering Information Box Leaded part number ZL30101QDC has been obsoleted and
replaced by ZL30101QDG1.
Page Item Change
1 Ordering Information Box Updated Ordering Information
Page Item Change
1 Features Added description for hitless reference switching.
23 Section 6.1 Removed power supply decoupling circuit and included
reference to synchronizer power supply decoupling application
note.
Page Item Change
9RST
pin Specified clock and frame pulse outputs forced to high
impedance
28 Table “DC Electrical Characteristics*“ Corrected Schmitt trigger levels
32 Table “Performance Characteristics* -
Functional“
Gave more detail on Lock Time conditions
ZL30101 Data Sheet
6
Zarlink Semiconductor Inc.
Changes from June 2004 Issue to October 2004 Issue. Page, section, figure and table numbers refer to this issue.
Page Item Change
1 Text Jitter changed to 0.6 ns from 0.5 ns
7 Figure 2 Added note specifying not e-Pad
8 Table “Pin Description“ Added information about Schmitt trigger feedback paths to
C1.5o, C2o, C16o
, and F8/F32o
11 Section 3.2 Added text about input pulse width restriction
16 Section 3.4 Added details on LOCK pin behaviour
20 Section 4.4 Added text and Figure 10 explaining LOCK pin behaviour
21 Section 5.0 Added Jitter definition
26 Section 6.4 Corrected time-constant of example reset circuit
27 Table “Absolute Maximum Ratings*“ Corrected package power rating
28 Table “DC Electrical Characteristics*“ Corrected current consumption
Corrected input voltage characteristics to reflect Schmitt trigger
Corrected input leakage current to reflect internal pull-ups
Corrected output voltage note to reflect two pad strengths
29 Table “AC Electrical Characteristics* -
Input Timing for REF0 and REF1
References (see Figure 15)“
Added explanatory note
33 Table “Performance Characteristics*:
Output Jitter Generation - ANSI
T1.403 Conformance“
Changed jitter numbers
33 Table “Performance Characteristics*:
Output Jitter Generation - ITU-T
G.812 Conformance“
Changed jitter number
33 Table “Performance Characteristics* -
Unfiltered Intrinsic Jitter“
Changed jitter numbers, removed UI column

ZL30101QDG1

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Clock Generators & Support Products Pb Free T1/E1 SYSTEM SYNCHRONIZER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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