24LC32AFT-I/OT Datasheet 24AA32AFT-I/OT, 24AA32AFT-I/SN, 24AA32AFT-I/MNY | P1-P3

24AA32AF/24LC32AF

Device Selection Table

Features:

• Single Supply with Operation down to 1.7V for

24AA32AF devices, 2.5V for 24LC32AF devices

• Low-Power CMOS Technology:

- Read current 400 μA, max.

- Standby current 1 μA, max. (I-temp)

• 2-Wire Serial Interface, I

C™ Compatible

• Packages with 3 Address Pins are Cascadable up

to Eight Devices

• Schmitt Trigger Inputs for Noise Suppression

• Output Slope Control to Eliminate Ground Bounce

• 100 kHz and 400 kHz Clock Compatibility

• Page Write Time 5 ms max.

• Self-Timed Erase/Write Cycle

• 32-Byte Page Write Buffer

• Hardware Write-Protect for 1/4 Array

(C00h-FFFh)

• ESD Protection > 4,000V

• More than 1 Million Erase/Write Cycles

• Data Retention > 200 Years

• Factory Programming Available

• Packages Include 8-lead PDIP, SOIC, TSSOP,

MSOP, TDFN and 5-lead SOT-23

• Pb-Free and RoHS Compliant

• Temperature Ranges:

- Industrial (I): -40°C to +85°C

- Automotive (E): -40°C to +125°C

Description:

The Microchip Technology Inc. 24AA32AF/24LC32AF

(24XX32AF*) is a 32 Kbit Electrically Erasable PROM.

The device is organized as a single block of 4K x 8-bit

memory with a 2-wire serial interface. Low-voltage

design permits operation down to 1.7V, with standby

and read currents of only 1 μA and 400 μA,

respectively. It has been developed for advanced, low-

power applications such as personal communications

or data acquisition. The 24XX32AF also has a page

write capability for up to 32 bytes of data. Functional

address lines allow up to eight devices on the same

bus, for up to 256 Kbits address space. The 24XX32AF

is available in the standard 8-pin PDIP, surface mount

SOIC, TSSOP, TDFN and MSOP packages. The

24XX32AF is also available in the 5-lead SOT-23

package.

Block Diagram

Package Types

Part

Number

VCC

Range

Max. Clock

Frequency

Temp.

Ranges

24AA32AF 1.7-5.5 400 kHz

(1)

24LC32AF 2.5-5.5 400 kHz I, E

Note 1: 100 kHz for VCC <2.5V.

HV Generator

EEPROM

Array

Page Latches

YDEC

XDEC

Sense Amp.

R/W Control

I/O

Control

Logic

I/O

Memory

Control

Logic

SCL

SDA

Vcc

VCC

SCL

SDA

PDIP, MSOP, SOIC, TSSOP

SOT-23

SCL

SDA

TDFN

SCL

SDA

32K I

™

Serial EEPROM with Quarter-Array Write-Protect

*24XX32AF is used in this document as a generic part number for the 24AA32AF/24LC32AF devices.

24AA32AF/24LC32AF

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings

(†)

VCC.............................................................................................................................................................................6.5V

All inputs and outputs w.r.t. V

SS ......................................................................................................... -0.3V to VCC +1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied................................................................................................-40°C to +125°C

ESD protection on all pins ......................................................................................................................................................≥ 4 kV

TABLE 1-1: DC CHARACTERISTICS

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to

the device. This is a stress rating only and functional operation of the device at those or any other conditions

above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating

conditions for extended periods may affect device reliability.

DC CHARACTERISTICS

Industrial (I): TA = -40°C to +85°C, VCC = +1.7V to +5.5V

Automotive (E): T

A = -40°C to +125°C, VCC = +2.5V to +5.5V

Param.

No.

Symbol Characteristic Min. Typ. Max. Units Conditions

D1 — A0, A1, A2, WP, SCL

and SDA pins

— ————

D2 V

IH High-level input voltage 0.7 VCC ——V—

D3 VIL Low-level input voltage — — 0.3 VCC

0.2 VCC

VCC ≥ 2.5V

CC < 2.5V

D4 VHYS Hysteresis of Schmitt

Trigger inputs (SDA,

SCL pins)

0.05 VCC ——VVCC ≥ 2.5V (Note 1)

D5 VOL Low-level output voltage — — 0.40 V IOL = 3.0 mA, VCC = 4.5V

OL = 2.1 mA, Vcc = 2.5V

D6 I

LI Input leakage current ——±1μAVIN = VSS or VCC

D7 ILO Output leakage current ——±1μAVOUT = VSS or VCC

D8 CIN,

OUT

Pin capacitance

(all inputs/outputs)

——10pFVCC = 5.0V (Note 1)

A = 25°C, FCLK = 1 MHz

D9 I

CC write Operating current —0.1 3mAVCC = 5.5V, SCL = 400 kHz

D10 I

CC read — 0.05 400 μA

D11 I

CCS Standby current —

—

0.01

—

μA

Industrial

Automotive

SDA = SCL = V

CC = 5.5V

A0, A1, A2, WP = V

Note 1: This parameter is periodically sampled and not 100% tested.

2: Typical measurements taken at room temperature.

24AA32AF/24LC32AF

TABLE 1-2: AC CHARACTERISTICS

AC CHARACTERISTICS

Electrical Characteristics:

Industrial (I): VCC = +1.7V to 5.5V TA = -40°C to +85°C

Automotive (E): V

CC = +2.5V to 5.5V TA = -40°C to 125°C

Param.

No.

Sym. Characteristic Min. Max. Units Conditions

CLK Clock frequency —

—

100

400

kHz 1.7V ≤ VCC < 2.5V

2.5V ≤ V

CC ≤ 5.5V

2THIGH Clock high time 4000

600

—

ns 1.7V ≤ VCC < 2.5V

2.5V ≤ V

CC ≤ 5.5V

3TLOW Clock low time 4700

1300

—

ns 1.7V ≤ VCC < 2.5V

2.5V ≤ V

CC ≤ 5.5V

R SDA and SCL rise time

(Note 1)

—

1000

300

ns 1.7V ≤ VCC < 2.5V

2.5V ≤ V

CC ≤ 5.5V

5TF SDA and SCL fall time

(Note 1)

—300ns

HD:STA Start condition hold time 4000

600

—

ns 1.7V ≤ VCC < 2.5V

2.5V ≤ V

CC ≤ 5.5V

SU:STA Start condition setup time 4700

600

—

ns 1.7V ≤ VCC < 2.5V

2.5V ≤ V

CC ≤ 5.5V

8THD:DAT Data input hold time 0 — ns (Note 2)

SU:DAT Data input setup time 250

100

—

ns 1.7V ≤ VCC < 2.5V

2.5V ≤ V

CC ≤ 5.5V

10 TSU:STO Stop condition setup time 4000

600

—

ns 1.7 V ≤ VCC < 2.5V

2.5 V ≤ V

CC ≤ 5.5V

11 TSU:WP WP setup time 4000

600

—

ns 1.7V ≤ VCC < 2.5V

2.5V ≤ V

CC ≤ 5.5V

12 T

HD:WP WP hold time 4700

1300

—

ns 1.7V ≤ VCC < 2.5V

2.5V ≤ V

CC ≤ 5.5V

13 TAA Output valid from clock

(Note 2)

—

3500

900

ns 1.7V ≤ VCC < 2.5V

2.5V ≤ V

CC ≤ 5.5V

14 TBUF Bus free time: Time the bus

must be free before a new

transmission can start

4700

1300

—

ns 1.7V ≤ VCC < 2.5V

2.5V ≤ V

CC ≤ 5.5V

15 T

OF Output fall time from VIH

minimum to V

IL maximum

B ≤ 100 pF

10 +

0.1C

250 ns (Note 1)

16 TSP Input filter spike suppression

(SDA and SCL pins)

—50ns(Notes 1 and 3)

17 T

WC Write cycle time (byte or

page)

—5ms—

18 — Endurance 1,000,000 — cycles 25°C (Note 4)

Note 1: Not 100% tested. C

B = total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region

(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

3: The combined T

SP and VHYS specifications are due to new Schmitt Trigger inputs, which provide improved

noise spike suppression. This eliminates the need for a T

I specification for standard operation.

4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s web site

at www.microchip.com.

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24LC32AFT-I/OT

Mfr. #:

Buy 24LC32AFT-I/OT

Manufacturer:

Microchip Technology

Description:

EEPROM 32K 4K X 8 2.5V SER EE IND 1/4AWP

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New from this manufacturer.

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24LC32AFT-I/OT

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